English
Language : 

ISL62883C Datasheet, PDF (14/43 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5™ Mobile CPUs and GPUs
ISL62883C
ISL62883C is in 1-phase mode, the master clock signal
will be distributed to Phases 1 only and be the Clock1
signal.
Each slave circuit has its own ripple capacitor Crs,
whose voltage mimics the inductor ripple current. A gm
amplifier converts the inductor voltage into a current
source to charge and discharge Crs. The slave circuit
turns on its PWM pulse upon receiving the clock signal,
and the current source charges Crs. When Crs voltage
VCrs hits VW, the slave circuit turns off the PWM pulse,
and the current source discharges Crs.
Since the ISL62883C works with Vcrs, which are
large-amplitude and noise-free synthesized signals,
the ISL62883C achieves lower phase jitter than
conventional hysteretic mode and fixed PWM mode
controllers. Unlike conventional hysteretic mode
converters, the ISL62883C has an error amplifier that
allows the controller to maintain a 0.5% output voltage
accuracy.
Figure 7 shows the operation principles during load
insertion response. The COMP voltage rises during load
insertion, generating the master clock signal more
quickly, so the PWM pulses turn on earlier, increasing
the effective switching frequency, which allows for
higher control loop bandwidth than conventional fixed
frequency PWM controllers. The VW voltage rises as
the COMP voltage rises, making the PWM pulses wider.
During load release response, the COMP voltage falls.
It takes the master clock circuit longer to generate the
next master clock signal so the PWM pulse is held off
until needed. The VW voltage falls as the VW voltage
falls, reducing the current PWM pulse width. This kind
of behavior gives the ISL62883C excellent response
speed.
The fact that all the phases share the same VW
window voltage also ensures excellent dynamic current
balance among phases.
Diode Emulation and Period Stretching
Phase
ISL62883C can operate in diode emulation (DE) mode
to improve light load efficiency. In DE mode, the low-
side MOSFET conducts when the current is flowing from
source to drain and doesn’t not allow reverse current,
emulating a diode. As Figure 8 shows, when LGATE is
on, the low-side MOSFET carries current, creating
negative voltage on the phase node due to the voltage
drop across the ON-resistance. The ISL62883C
monitors the current through monitoring the phase
node voltage. It turns off LGATE when the phase node
voltage reaches zero to prevent the inductor current
from reversing the direction and creating unnecessary
power loss.
If the load current is light enough, as Figure 8 shows,
the inductor current will reach and stay at zero before
the next phase node pulse, and the regulator is in
discontinuous conduction mode (DCM). If the load
current is heavy enough, the inductor current will
never reach 0A, and the regulator is in CCM although
the controller is in DE mode.
Figure 9 shows the operation principle in diode
emulation mode at light load. The load gets
incrementally lighter in the three cases from top to
bottom. The PWM on-time is determined by the VW
window size, therefore is the same, making the inductor
current triangle the same in the three cases. The
ISL62883C clamps the ripple capacitor voltage Vcrs in
DE mode to make it mimic the inductor current. It takes
the COMP voltage longer to hit Vcrs, naturally stretching
the switching period. The inductor current triangles
move further apart from each other such that the
inductor current average value is equal to the load
current. The reduced switching frequency helps increase
light load efficiency.
Vcrs
CCM/DCM BOUNDARY
VW
iL
Vcrs
VW LIGHT DCM
UGATE
LGATE
IL
FIGURE 8. DIODE EMULATION
iL
Vcrs
DEEP DCM
VW
iL
FIGURE 9. PERIOD STRETCHING
14
FN7557.1
March 18, 2010