ISL6551_15 Datasheet, PDF (17/27 Pages) Intersil Corporation – ZVS Full Bridge PWM Controller

ISL6551
Additional Applications
Information
Table 1 highlights parameter setting for the ISL6551.
Designers can use this table as a design checklist. For detailed
operation of the ISL6551, see Block/Pin Functional
Descriptions.
PARAMETER
TABLE 1. PARAMETER SETTING HIGHLIGHTS/CHECKLIST
PIN NAME
FORMULA OR SETTING HIGHLIGHT
UNIT FIGURE #
Frequency
CT
Set 50% Duty Cycle Pulses with a fixed frequency
kHz
1, 5
Dead Time
RD
DT = M x RD/kΩ , where M = 11.4
ns
6
Resonant Delay
Ramp Adjust
Current Sense
Peak Current
R_RESDLY
R_RA
ISENSE
PKILIM
t_RESDLY = 4.01 x R_RESDLY/kΩ + 13
V_ramp = BGREF/(R_RA x 500E-12) x dt
<Vclamp-200mV-V_ramp
<BGREF and slightly higher than Vclamp
ns
10
V
-
V
-
V
9
Bandgap Reference
BGREF
1.263V ±2%, 399kΩ pull-up, no more than 100µA load
V
-
Leading Edge Blanking
Current Share Compensation
R_LEB
CS_COMP
t_LEB = 2 x R_LEB/kΩ + 15, never leave it floating
0.1µ for a low current loop bandwidth (100Hz to 500Hz)
ns
11, 12
Hz
13
Soft-start and Output Rise Time
Clamp Voltage (Vclamp)
CSS
t_ss = Vclamp x Css/Iss, t_rise = EANI x CSS / Iss, Iss = 10µA ±20%
S
7
CSS
Vclamp = Iss x Rcss, or reference based clamp
V
7, 8
Error Amplifier
EANI, EAI, EAO EANI, EAO<Vclamp
V
-
Share Support
SHARE
30k load and a resistor (1k, typ) between EANI and OUTPUT REF.
-
-
Latching Shutdown
LATSD
Latch IC off at >3V
V
-
Power-good
DCOK
±5% with hysteresis, Sink up to 5mA, transient rejection
V
14, 15
IC Enable
ON/OFF
Turn-on/off at TTL level
V
-
Reference Ground
VSS
Connect to PGND in only one single point
-
-
Power Ground
PGND
Single point to VSS plane
-
-
Upper Drivers
Lower Drivers
Synchronous Drive Signals
Bias for Control Circuits
UPPER1, UPPER2 Capacitive load up to 1.6nF at f_SW = 500kHz
LOWER1, LOWER2 Capacitive load up to 1.6nF at f_SW = 500kHz
SYNC1, SYNC2 Capacitive load up to 20pF at f_SW = 500kHz
VDD
12V ±10%, 0.1µF decoupling capacitor
-
-
-
-
-
-
V
-
Biases for Bridge Drivers
VDDP1, VDDP2 Need decoupling capacitors
V
-
NOTE: V_DD = 12V at room temperature, unless otherwise stated.
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FN9066.6
April 30, 2015