ISL62875 Datasheet, PDF (15/22 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62875
reference setpoint. The SSOK flag is set, the PGOOD pin
goes high, and the I_SS current source changes over to
the voltage-step current source I_VS which has a current
limit of ±100µA. Whenever the VID inputs or the
external setpoint reference, programs a different setpoint
reference voltage, the I_VS current source charges or
discharges capacitor C_SOFT to that new level at ±100µA.
Once C_SOFT charges to the selected setpoint voltage, the
I_VS current source comes out of the 100µA current limit
and decays to the static value set by V_SREF ÷ R_T. The
elapsed time to charge C_SOFT to the new voltage is
called the voltage-step delay t_VS and is given by
Equation 17:
t_VS = – (R_T ⋅ C_SOFT) ⋅ LN(1 – ⁽---^V----^N----^E-_I--_V-^W---_S----–-_â‹---_RV----_TO-----^L---^D-----⁾)
(EQ. 17)
Where:
- I_VS is the ±100µA setpoint voltage-step current
- V_NEW is the new setpoint voltage selected by the
VID inputs
- V_OLD is the setpoint voltage that V_NEW is changing
from
- R_T is the sum of the R_SET programming resistors
Component Selection For C_SOFT Capacitor
Choosing the C_SOFT capacitor to meet the requirements
of a particular soft-start delay t_SS is calculated with
Equation 18, which is written as:
C_SOFT
=
-----------------------------–---^t--^S----^S-------------------------------
⎛
⎜
⎝
R_T
⋅
L
N(1
–
-^V----^S_I--_S-^T---_SA----^R-_â‹---^T_R---^--_T-^U---^P-- )_{⎠⎟⎞}
(EQ. 18)
Where:
- t_SS is the soft-start delay
- I_SS is the soft-start current source at the 20µA
limit
- V_START-UP is the setpoint reference voltage
selected by the state of the VID inputs at the time
EN is asserted
- R_T is the sum of the R_SET programming resistors
Choosing the C_SOFT capacitor to meet the requirements
of a particular voltage-step delay t_VS is calculated with
Equation 19, which is written as:
C_SOFT
=
---------------------------------–----^t--^V----^S----------------------------------
⎛
⎜
⎝
R_T
⋅
L
N(1
–
-^V----^N---_±-^E--_I--^WV----_S--–---_â‹--^V-_R---^O-_T---^L----^D--)_{⎠⎟⎞}
(EQ. 19)
Where:
- t_VS is the voltage-step delay
- V_NEW is the new setpoint voltage
- V_OLD is the setpoint voltage that V_NEW is changing
from
- I_VS is the ±100µA setpoint voltage-step current;
positive when V_NEW > V_OLD, negative when V_NEW
< V_OLD
- R_T is the sum of the R_SET programming resistors
Compensation Design
Figure 8 shows the recommended Type-II compensation
circuit. The FB pin is the inverting input of the error
amplifier. The COMP signal, the output of the error
amplifier, is inside the chip and unavailable to users.
C_INT is a 100pF capacitor integrated inside the IC,
connecting across the FB pin and the COMP signal. R_FB,
R_COMP, C_COMP and C_INT form the Type-II compensator.
The frequency domain transfer function is given by
Equation 20:
G_COMP(s)
=
-------------¹----+-----^s-----^â‹---⁽--^R-----^F---^B-----+-----^R-----^C----^O-----^M----^P----⁾----^â‹---^C----^C----^O-----^M-----^P--------------
s
⋅
R_F
B
⋅
C_INT
⋅
(
1
+
s
⋅
R_CO
M
P
⋅
C
COMP
)
(EQ. 20)
C_INT = 100pF
R_COMP ^CCOMP
COMP
-
FB
EA
+
SREF
R_FB
R_OFS
V_OUT
FIGURE 8. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant
frequency that causes rapid phase change. The R³
modulator used in the IC makes the LC output filter
resemble a first order system in which the closed loop
stability can be achieved with the recommended Type-II
compensation network. Intersil provides a PC-based tool
that can be used to calculate compensation network
component values and help simulate the loop frequency
response.
Fault Protection
Overcurrent
The overcurrent protection (OCP) setpoint is
programmed with resistor R_OCSET which is connected
across the OCSET and PHASE pins. Resistor R_O is
connected between the VO pin and the actual output
voltage of the converter. During normal operation, the
VO pin is a high impedance path, therefore there is no
voltage drop across R_O. The value of resistor R_O should
always match the value of resistor R_OCSET.
L
PHASE
DCR
+
V_DCR
I_L
V_O
_
R_OCSET
C_SEN
C_O
10µA
OCSET
+ ^{_ V}ROCSET
R_O
VO
FIGURE 9. OVERCURRENT PROGRAMMING CIRCUIT
15
September 18, 2009
FN6905.1