ISL62875 Datasheet, PDF (14/22 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62875
The equation for the value of R_SET3 is written as
Equation 9:
R_SET3
=
R_{-----S----E----T----4----}⋅_---(_--K_-----V_{----S----E----T---4-----–----}K_-----V_{----S----E----T----3---})
KV_SET3
(EQ. 9)
The sum of all the programming resistors should be
approximately 300kΩ as shown in Equation 10 otherwise
adjust the value of R_SET4 and repeat the calculations.
R_SET1 + R_SET2 + R_SET3 + R_SET4 ≅ 300kΩ
(EQ. 10)
Equations 11, 12, 13 and 14 give the specific V_SET gain
equations for the ISL62875 setpoint reference voltages.
The ISL62875 V_SET1 setpoint is written as Equation 11:
V_SET1 = V_REF
(EQ. 11)
The ISL62875 V_SET2 setpoint is written as Equation 12:
V_SET2
=
V_REF
⋅
⎛
⎜1
⎝
+
R^-----_S^----_E^----_T^----₂^----+-----RR^{----SS----EE----TT----13----+-----}R^-----_S^----_E^---_T^----₄^- _{⎠⎟⎞}
(EQ. 12)
The ISL62875 V_SET3 setpoint is written as Equation 13:
V_SET3
=
V_REF
⋅
⎛
⎜1
⎝
+
RR_{-----SS----EE----TT----13----++-----}RR_{----SS----EE----TT----24-⎠⎟⎞}
(EQ. 13)
The ISL62875 V_SET4 setpoint is written as Equation 14:
V_SET4
=
V_REF
⋅
⎛
⎜1
⎝
+
R_{-----S----E----T----1----+-----RR----SS----EE----TT----24----+-----}R_{-----S----E---T----3- ⎠⎟⎞}
(EQ. 14)
External Setpoint Reference
V_OUT R_FB
FB
-
EA
+
V_COMP
V_REF
500mV
+
V_SET
-
SREF
SW0
SET0
SW1
SET1
SW2
SET2
SW3
FIGURE 7. VOLTAGE PROGRAMMING CIRCUIT
The IC can use an external setpoint reference voltage as
an alternative to VID-selected, resistor-programmed
setpoints. This is accomplished by removing all setpoint
programming resistors, connecting the SET0 pin to the
VCC pin, and feeding the external setpoint reference
voltage to the VID0 pin. When SET0 and VCC are tied
together, the following internal reconfigurations take
place:
- VID0 pin opens its 500nA pull-down current sink
- Reference source selector switch SW4 moves from
INT position (internal 500mV) to EXT position
(VID0 pin)
- VID1 pin is disabled
The converter will now be in regulation when the voltage
on the FB pin equals the voltage on the VID0 pin. As with
resistor-programmed setpoints, the reference voltage
range on the VID0 pin is 500mV to 1.5V. Use Equations
3, 4, and 5 beginning on page 13 should it become
necessary to implement an output voltage-divider
network to make the external setpoint reference voltage
compatible with the 500mV to 1.5V constraint.
Soft-Start and Voltage-Step
Delay
Circuit Description
When the voltage on the VCC pin has ramped above the
rising power-on reset voltage V_{VCC_THR}, and the voltage
on the EN pin has increased above the rising enable
threshold voltage V_ENTHR, the SREF pin releases its
discharge clamp and enables the reference amplifier
V_SET. The soft-start current I_SS is limited to 20µA and is
sourced out of the SREF pin into the parallel RC network
of capacitor C_SOFT and resistance R_T. The resistance R_T
is the sum of all the series connected R_SET programming
resistors and is written as Equation 15:
R_T = R_SET1 + R_SET2 + …R_SET(n)
(EQ. 15)
The voltage on the SREF pin rises as I_SS charges C_SOFT
to the voltage reference setpoint selected by the state of
the VID inputs at the time the EN pin is asserted. The
regulator controls the PWM such that the voltage on the
FB pin tracks the rising voltage on the SREF pin. Once
C_SOFT charges to the selected setpoint voltage, the I_SS
current source comes out of the 20µA current limit and
decays to the static value set by V_SREF ÷ R_T. The elapsed
time from when the EN pin is asserted to when V_SREF
has reached the voltage reference setpoint is the soft-
start delay t_SS which is given by Equation 16:
t_SS = – (R_T ⋅ C_SOFT) ⋅ LN(1 – -^V----^S_I--_S-^T---_SA----^R-_â‹---^T_R---^--_T-^U---^P-- )
(EQ. 16)
Where:
- I_SS is the soft-start current source at the 20µA
limit
- V_START-UP is the setpoint reference voltage
selected by the state of the VID inputs at the time
EN is asserted
- R_T is the sum of the R_SET programming resistors
The end of soft-start is detected by I_SS tapering off when
capacitor C_SOFT charges to the designated V_SET voltage
14
September 18, 2009
FN6905.1