ISL62875 Datasheet, PDF (12/22 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62875
window voltage V_W. This measure is taken to prevent
oscillating between modes at the boundary between CCM
and DCM. The 30% increase of V_W is removed upon exit
of DEM, forcing the PWM switching frequency to jump
back to the nominal CCM value.
Power-On Reset
The IC is disabled until the voltage at the VCC pin has
increased above the rising power-on reset (POR)
threshold voltage V_{VCC_THR}. The controller will become
disabled when the voltage at the VCC pin decreases below
the falling POR threshold voltage V_{VCC_THF}. The POR
detector has a noise filter of approximately 1µs.
V_IN and PVCC Voltage Sequence
Prior to pulling EN above the V_ENTHR rising threshold
voltage, the following criteria must be met:
- V_PVCC is at least equivalent to the VCC rising
power-on reset voltage V_{VCC_THR}
- V_VIN must be 3.3V or the minimum required by the
application
Start-Up Timing
Once VCC has ramped above V_{VCC_THR}, the controller
can be enabled by pulling the EN pin voltage above the
input-high threshold V_ENTHR. Approximately 20µs later,
the voltage at the SREF pin begins slewing to the
designated VID set-point. The converter output voltage
at the FB feedback pin follows the voltage at the SREF
pin. During soft-start, The regulator always operates in
CCM until the soft-start sequence is complete.
PGOOD Monitor
The PGOOD pin indicates when the converter is capable
of supplying regulated voltage. The PGOOD pin is an
undefined impedance if the VCC pin has not reached the
rising POR threshold V_{VCC_THR}, or if the VCC pin is below
the falling POR threshold V_{VCC_THF}. The PGOOD
pull-down resistance corresponds to a specific protective
fault, thereby reducing troubleshooting time and effort.
Table 1 maps the pull-down resistance of the PGOOD pin
to the corresponding fault status of the controller.
TABLE 1. PGOOD PULL-DOWN RESISTANCE
CONDITION
PGOOD RESISTANCE
VCC Below POR
Soft-Start or Undervoltage
Overcurrent
Undefined
95Ω
35Ω
LGATE and UGATE MOSFET Gate-Drivers
The LGATE pin and UGATE pins are MOSFET driver
outputs. The LGATE pin drives the low-side MOSFET of
the converter while the UGATE pin drives the high-side
MOSFET of the converter.
The LGATE driver is optimized for low duty-cycle
applications where the low-side MOSFET experiences
long conduction times. In this environment, the low-side
MOSFETs require exceptionally low r_DS(ON) and tend to
have large parasitic charges that conduct transient
currents within the devices in response to high dv/dt
switching present at the phase node. The drain-gate
charge in particular can conduct sufficient current
through the driver pull-down resistance that the V_GS(th)
of the device can be exceeded and turned on. For this
reason the LGATE driver has been designed with low
pull-down resistance and high sink current capability to
ensure clamping the MOSFETs gate voltage below
V_GS(th).
Adaptive Shoot-Through Protection
Adaptive shoot-through protection prevents a gate-driver
output from turning on until the opposite gate-driver
output has fallen below approximately 1V. The dead-time
shown in Figure 6 is extended by the additional period
that the falling gate voltage remains above the 1V
threshold. The high-side gate-driver output voltage is
measured across the UGATE and PHASE pins while the
low-side gate-driver output voltage is measured across
the LGATE and PGND pins. The power for the LGATE
gate-driver is sourced directly from the PVCC pin. The
power for the UGATE gate-driver is supplied by a boot-
strap capacitor connected across the BOOT and PHASE
pins. The capacitor is charged each time the phase node
voltage falls a diode drop below PVCC such as when the
low-side MOSFET is turned on.
UGATE
1V
1V
1V
1V
LGATE
FIGURE 6. GATE DRIVER ADAPTIVE SHOOT-THROUGH
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September 18, 2009
FN6905.1