ISL62875 Datasheet, PDF (11/22 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62875
Theory of Operation
The modulator features Intersil’s R³ Robust-Ripple-
Regulator technology, a hybrid of fixed frequency PWM
control and variable frequency hysteretic control. The
PWM frequency is maintained at 500kHz under static
continuous-conduction-mode operation within the entire
specified envelope of input voltage, output voltage, and
output load. If the application should experience a rising
load transient and/or a falling line transient such that the
output voltage starts to fall, the modulator will extend
the on-time and/or reduce the off-time of the PWM pulse
in progress. Conversely, if the application should
experience a falling load transient and/or a rising line
transient such that the output voltage starts to rise, the
modulator will truncate the on-time and/or extend the
off-time of the PWM pulse in progress. The period and
duty cycle of the ensuing PWM pulses are optimized by
the R³ modulator for the remainder of the transient and
work in concert with the error amplifier V_ERR to maintain
output voltage regulation. Once the transient has
dissipated and the control loop has recovered, the PWM
frequency returns to the nominal static 500kHz.
Modulator
The R³ modulator synthesizes an AC signal V_R, which is
an analog representation of the output inductor ripple
current. The duty-cycle of V_R is the result of charge and
discharge current through a ripple capacitor C_R. The
current through C_R is provided by a transconductance
amplifier g_m that measures the input voltage (V_IN) at the
PHASE pin and output voltage (V_OUT) at the VO pin. The
positive slope of V_R can be written as Equation 1:
V_RPOS = (g_m) ⋅ (V_IN – V_OUT) ⁄ C_R
(EQ. 1)
The negative slope of V_R can be written as Equation 2:
V_RNEG = g_m ⋅ V_OUT ⁄ C_R
(EQ. 2)
Where, g_m is the gain of the transconductance amplifier.
A window voltage V_W is referenced with respect to the
error amplifier output voltage V_COMP, creating an
envelope into which the ripple voltage V_R is compared.
The amplitude of V_W is controlled internally by the IC.
The V_R, V_COMP, and V_W signals feed into a window
comparator in which V_COMP is the lower threshold
voltage and V_W is the higher threshold voltage. Figure 5
shows PWM pulses being generated as V_R traverses the
V_W and V_COMP thresholds. The PWM switching frequency
is proportional to the slew rates of the positive and
negative slopes of V_R; it is inversely proportional to the
voltage between V_W and V_COMP.
Synchronous Rectification
A standard DC/DC buck regulator uses a free-wheeling
diode to maintain uninterrupted current conduction
through the output inductor when the high-side MOSFET
switches off for the balance of the PWM switching cycle.
Low conversion efficiency as a result of the conduction
loss of the diode makes this an unattractive option for all
but the lowest current applications. Efficiency is
dramatically improved when the free-wheeling diode is
replaced with a MOSFET that is turned on whenever the
high-side MOSFET is turned off. This modification to the
standard DC/DC buck regulator is referred to as
synchronous rectification, the topology implemented by
the ISL62875 controller.
RIPPLE CAPACITOR VOLTAGE C_R ^{WINDOW VOLTAGE VW}
ERROR AMPLIFIER VOLTAGE V_COMP
PWM
FIGURE 5. MODULATOR WAVEFORMS DURING LOAD
TRANSIENT
Diode Emulation
The polarity of the output inductor current is defined as
positive when conducting away from the phase node,
and defined as negative when conducting towards the
phase node. The DC component of the inductor current is
positive, but the AC component known as the ripple
current, can be either positive or negative. Should the
sum of the AC and DC components of the inductor
current remain positive for the entire switching period,
the converter is in continuous-conduction-mode (CCM.)
However, if the inductor current becomes negative or
zero, the converter is in discontinuous-conduction-mode
(DCM.)
Unlike the standard DC/DC buck regulator, the
synchronous rectifier can sink current from the output
filter inductor during DCM, reducing the light-load
efficiency with unnecessary conduction loss as the low-
side MOSFET sinks the inductor current. The ISL62875
controller avoids the DCM conduction loss by making the
low-side MOSFET emulate the current-blocking behavior
of a diode. This smart-diode operation called diode-
emulation-mode (DEM) is triggered when the negative
inductor current produces a positive voltage drop across
the r_DS(ON) of the low-side MOSFET for eight consecutive
PWM cycles while the LGATE pin is high. The converter
will exit DEM on the next PWM pulse after detecting a
negative voltage across the r_DS(ON) of the low-side
MOSFET.
It is characteristic of the R³ architecture for the PWM
switching frequency to decrease while in DCM, increasing
efficiency by reducing unnecessary gate-driver switching
losses. The extent of the frequency reduction is
proportional to the reduction of load current. Upon
entering DEM, the PWM frequency is forced to fall
approximately 30% by forcing a similar increase of the
11
September 18, 2009
FN6905.1