ISL62875 Datasheet, PDF (13/22 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62875
Setpoint Reference Voltage
Programming
Voltage identification (VID) pins select user-programmed
setpoint reference voltages that appear at the SREF pin.
The converter is in regulation when the FB pin voltage
(V_FB) equals the SREF pin voltage (V_SREF.) The IC
measures V_FB and V_SREF relative to the GND pin, not the
PGND pin. The setpoint reference voltages use the
naming convention V_SET(x) where (x) is the first, second,
third, or fourth setpoint reference voltage where:
- V_SET1 < V_SET2 < V_SET3 < V_SET4
- V_OUT1 < V_OUT2 < V_OUT3 < V_OUT4
The V_SET1 setpoint is fixed at 500mV because it
corresponds to the closure of internal switch SW0 that
configures the V_SET amplifier as a unity-gain voltage
follower for the 500mV voltage reference V_REF.
A feedback voltage-divider network may be required to
achieve the desired reference voltages. Using the
feedback voltage-divider allows the maximum output
voltage of the converter to be higher than the 1.5V
maximum setpoint reference voltage that can be
programmed on the SREF pin. Likewise, the feedback
voltage-divider allows the minimum output voltage of the
converter to be higher than the fixed 500mV setpoint
reference voltage of V_SET1. Scale the voltage-divider
network such that the voltage V_FB equals the voltage
V_SREF when the converter output voltage is at the
desired level. The voltage-divider relation is given in
Equation 3:
V_FB
=
V_O
U
T
⋅
----------^R----^O-----^F---^S-----------
R_FB + R_OFS
(EQ. 3)
Where:
- V_FB = V_SREF
- R_FB is the loop-compensation feedback resistor
that connects from the FB pin to the converter
output
- R_OFS is the voltage-scaling programming resistor
that connects from the FB pin to the GND pin
The attenuation of the feedback voltage divider is written
as:
K
=
V_{-----S----R----E----F---(---l-i--m----)}
V_OUT(lim)
=
----------^R----^O-----^F---^S-----------
R_FB + R_OFS
(EQ. 4)
Where:
- K is the attenuation factor
- V_SREF(lim) is the V_SREF voltage setpoint of either
500mV or 1.50V
- V_OUT(lim) is the output voltage of the converter
when V_SREF = V_SREF(lim)
Since the voltage-divider network is in the feedback
path, all output voltage setpoints will be attenuated by K,
so it follows that all of the setpoint reference voltages will
be attenuated by K. It will be necessary then to include
the attenuation factor K in all the calculations for
selecting the R_SET programming resistors.
The value of offset resistor R_OFS can be calculated only
after the value of loop-compensation resistor R_FB has
been determined. The calculation of R_OFS is written as
Equation 5:
R_OFS
=
---^V-----^S----^E----^T---⁽--^x---⁾----^â‹---^R----^F----^B-----
V_OUT – V_SET(x)
(EQ. 5)
The setpoint reference voltages are programmed with
resistors that use the naming convention R_SET(x) where
(x) is the first, second, third, or fourth programming
resistor connected in series starting at the SREF pin and
ending at the GND pin. When one of the internal switches
closes, it connects the inverting input of the V_SET
amplifier to a specific node among the string of R_SET
programming resistors. All the resistors between that
node and the SREF pin serve as the feedback impedance
R_F of the V_SET amplifier. Likewise, all the resistors
between that node and the GND pin serve as the input
impedance R_IN of the V_SET amplifier. Equation 6 gives
the general form of the gain equation for the V_SET
amplifier:
V_{SET(X )}
=
V_RE
F
⋅
⎛
⎜
⎝
1
+
R^--R---_I^-F-_N^--_{⎠⎟⎞}
(EQ. 6)
Where:
- V_REF is the 500mV internal reference of the IC
- V_SET(x) is the resulting setpoint reference voltage
that appears at the SREF pin
Calculating Setpoint Voltage Programming
Resistor Values
TABLE 2. ISL62875 VID TRUTH TABLE
VID STATE
RESULT
VID1
VID0
CLOSE
V_SREF
V_OUT
1
1
SW0
V_SET1
V_OUT1
1
0
SW1
V_SET2
V_OUT2
0
1
SW2
V_SET3
V_OUT3
0
0
SW3
V_SET4
V_OUT4
First, determine the attenuation factor K. Next, assign an
initial value to R_SET4 of approximately 100kΩ then
calculate R_SET1, R_SET2, and R_SET3 using Equations 7, 8,
and 9 respectively. The equation for the value of R_SET1 is
written as Equation 7:
R_SET1
=
-^R----^S----^E----^T----⁴----^â‹---^K----^V-----^S----^E---^T----⁴----^â‹---⁽---^K----^V-----^S----^E---^T----²----–-----^V----^R----^E----^F----⁾
V_REF ⋅ KV_SET2
(EQ. 7)
The equation for the value of R_SET2 is written as
Equation 8:
R_SET2 = -^R----^S----^E----^T----⁴----^â‹---^K----^V-_K----^S-_V---^E-_S--^T--_E--⁴--_T--^â‹-₂--⁽---_â‹^K---_K-^V---_V--^S--_S--^E--_E-^T---_T-³---₃-–-----^K----^V-----^S----^E---^T----²----⁾
(EQ. 8)
13
September 18, 2009
FN6905.1