82595FX Datasheet, PDF (8/54 Pages) Intel Corporation – ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER

82595FX
2 2 Local Memory Interface
Symbol
Pin
No
Type
Name and Function
LADDR0
LADDR1
LADDR2
LADDR3
LADDR4
LADDR5
LADDR6
LADDR7
LADDR8
LADDR9
LADDR10
LADDR11
LADDR12
LADDR13
LADDR14
LADDR15
143 O LOCAL MEMORY ADDRESS (LADDR0 – LADDR15) These outputs
144
contain the multiplexed address for the local SRAM
145
FLASH ADDRESS 14 – 17 (LADDR0 – LADDR5) These pins control the
146
FLASH addressing from 16K to 1M to allow paging of the FLASH in 16K
147
spaces These addresses are under direct control of the FLASH PAGING
148
configuration register
149
150
153
154
155
156
157
158
159
2
LDATA0
LDATA1
LDATA2
LDATA3
LDATA4
LDATA5
LDATA6
LDATA7
132 I O LOCAL MEMORY DATA BUS (LDATA0 – LDATA7) The eight I O
133
signals comprising the local data bus are used to read or write data to or
134
from the 8-bit wide SRAM
135
FLASH MEMORY DATA BUS (LDATA0 – LDATA7) These signals also
137
provide eight bits of data for accesses to an 8-bit FLASH EPROM if these
138
components are used
139
140
SRAMCS
13 O SRAM CHIP SELECT This active low output is the chip select to the
SRAM
LWE
12 O This active low output is the Write Enable to the SRAM
This pin also provides the active low Write Enable to the FLASH
LOE
16 O This active low output is the Output Enable to the SRAM
This pin also provides the active low Output Enable control to the
FLASH
BOOTCS
10 O BOOT EPROM FLASH CHIP SELECT Active low output
EEPROMCS
8 I O EEPROM CS Active high signal If no EEPROM is connected this pin
should be connected to V_CC In this case it will function as an input to the
82595FX to indicate no EEPROM is connected
EEPROMSK 117 O EEPROM SHIFT CLOCK This output is used to shift data into and out of
the serial EEPROM
EEPROMDO 119 O EEPROM DATA OUT
EEPROMDI 118 O EEPROM DATA IN
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