82595FX Datasheet, PDF (37/54 Pages) Intel Corporation – ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER

82595FX
Table 11-2 Clock Timing
Symbol
Parameter
Min
Max
Unit
t1
X1 Cycle Time
49 995
50 005
ns
t2
X1 Fall Time
5
ns
t3
X1 Rise Time
5
ns
t4
X1 Low Time
15
ns
t5
X1 High Time
15
ns
11 4 ISA Interface Timing
Table 11-3 16-Bit I O Access
Parameter
Description
Min Max Units
Comments
T1a
AEN Valid to I O Command Active
100
ns
T2a
AEN Valid from I O Command Inactive 30
ns
T3a
SA to CMD Active
63
ns
T4a
SA Valid Hold from CMD Inactive
42
ns
T5a
Valid SA to IOCS16 Active
100 ns
T6a
IOCS16 Valid Hold from Valid SA
0
ns
T7a
CMD Active to Inactive
125
ns
T8a
CMD Inactive to Active
92
ns Before I O Command
T9a
Active CMD to Valid IOCHRDY
30 ns Applies to Ready Cycles
T10a
CMD Active Hold from IOCHRDY Active 80
ns Applies to Ready Cycles
T11a
DATA Driven from READ CMD Active
0
ns
T12a
Valid READ Data from CMD Active
64 ns Applies to Standard Cycles Only
T13a
Valid READ Data from IOCHRDY Active
52 ns Applies to Ready Cycles Only
T14a
READ Data Hold from CMD Inactive
0
ns
T15a
READ CMD Inactive to Data Tristate
30 ns
T16a
CMD to WRITE Data Active
62 ns
T17a
WRITE Data Hold from CMD Inactive 15
ns
T18a
WRITE CMD Inactive to Data Tristate
30 ns
37