82595FX Datasheet, PDF (41/54 Pages) Intel Corporation – ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER

82595FX
11 6 Local Memory Timings
11 6 1 SRAM TIMINGS
 The 82595FX any SRAM up to 25 ns access
time
 SRAM type supported are 4K 8K 16K 32K
64K x 8
Parameter
T1w
T2w
T3w
T4w
T5w
T6w
T7w
T8w
T9w
T10w
T1r
T2r
T3r
T4r
T5r
T6r
T7r
T8r
Table 11-6 82595FX SRAM AC Characteristics
Description
Min Max
LADDR Valid to SRAMCS Active
0
LADDR Valid to LWE Active
0
SRAMCS Active Time
25
LWE Active Time
25
Data Valid to SRAMCS Inactive
15
Data Valid to LWE Inactive
15
SRAMCS Inactive to Data Invalid
0
LWE Inactive to Data Invalid
0
SRAMCS Inactive to LADDR Invalid
0
LWE Inactive to LADDR Invalid
0
LADDR Valid to SRAMCS Active
0
LADDR Valid to LOE Active
0
SRAMCS Active Time
25
LOE Active Time
25
Data Valid to SRAMCS Active
25
Data Valid to LOE Inactive
25
Data Read Hold Time from SRAMCS Inactive
0
25
Read Data Hold Time from LOE Inactive
0
25
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Comments
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