82595FX Datasheet, PDF (35/54 Pages) Intel Corporation – ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER

82595FX
11 0 ELECTRICAL SPECIFICATIONS
AND TIMINGS
11 1 Absolute Maximum Ratings
Case Temperature under Bias
0 C to ^a85 C
NOTICE This data sheet contains information on
products in the sampling and initial production phases
of development The specifications are subject to
change without notice Verify with your local Intel
Sales office that you have the latest data sheet be-
fore finalizing a design
Storage Temperature
b_{65 C to} a_{140 C}
All Output and Supply Voltages
b_{0 5V to} a_7V
All Input Voltages
b_{1 0V to} a_{6 0V}(1)
Further information on the quality and reliability of
the 82595FX may be found in the Components
Quality and Reliability Handbook Order Number
210997
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
Symbol
Table 11-1 DC Characteristics (T_C ^e 0 C to ^a85 C V_CC ^e 5V g5%)
Parameter
Min
Max
Units
Test Conditions
V_IL
Input LOW Voltage (TTL)
b0 3
a0 8
V
V_IH
Input HIGH Voltage (TTL)
20
V_CC a 0 3
V
V_IH(JUMPR)
V_OL1(2)
V_OL2(3)
V_OL4(4)
Input HIGH Voltage (Jumpers)
Output LOW Voltage
Output LOW Voltage
Output LOW Voltage
30
V_CC a 0 3
V
0 45
V
I_OL e 17 mA
0 45
V
I_OL e 12 mA
0 45
V
I_OL e 2 mA
V_OH
V_OL (LED)⁽⁵⁾
Output HIGH Voltage
Output Low Voltage
24
V
I_OH e b1 mA
0 45
V
I_OL e 10 mA
V_OH (LED)
I_LP(6)
R_DIFF(7)
V_IDF (TPE)⁽⁸⁾
R_S (TPE)⁽⁹⁾
V_IDF (AUI)⁽¹⁰⁾
V_ICM (AUI)⁽¹¹⁾
Output High Voltage
Leakage Current
Input Differential-Resistance
Input Differential Accept
Input Differential Reject
Output Source Resistance
Input Differential Accept
Input Differential Reject
AC Input Common Mode
39
10
g0 5
5
g0 3
g 10
g3 1
g0 3
13
g1 5
g0 16
g0 5
g0 1
V
I_OH e b500 mA
mA 0 ^s V_I ^s V_CC
KX DC
V_P 5 MHz ^s f ^s 10 MHz
V_P
l l ^X
I_LOAD e 25 mA
V_P
V_P
V_P f ^s 40 KHz
V_P 40 KHz ^s f ^s 10 MHz
V_ODF (AUI)
Output Differential Voltage
g0 45
g1 2
V
I_OSC (AUI)
AUI Output Short Circuit Current
g150
mA Short Circuit to V_CC or GND
VU (AUI)
Output Differential Undershoot
b100
mV
V_ODI (AUI)⁽¹²⁾ Differential Idle Voltage
40
mV
I_CC
Power Supply Current
90
mA
I_CCHWPD
I_CCSWPD
I_CCSLEEP
C_IN(13)
Hardware Power Down
Software Power Down
Sleep Mode
Input Capacitance
400
mA
2
mA
35
mA
10
pF
f e 1 MHz
NOTES
1 The voltage level for RCV and CLSN pairs are b0 75V to a8 5V
2 SDx IOCS16
3 IOCHRDY IRQx
4 LDATAx LADDRx LOE LWE BOOTCS SRAMCS EEPROMCS SMOUT TSTCLK TDO J1 J2
5 LILED ACTLED POLED and TPE BNC AUI
6 Pins ACTLED LILED POLED TPE BNC AUI
7 RD to RD RCV to RCV and CLSN to CLSN
8 TPE input pins RD and RD
9 TPE output pins TDH TDH TDL and TDL R_S measure V_CC or V_SS to pin
10 AUI input pins RCV and CLSN pairs
11 AUI output pins TPMT pair
12 Measured 8 0 ms after last positive transition of data packet
13 Characterized not tested
35