82595FX Datasheet, PDF (31/54 Pages) Intel Corporation – ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER

82595FX
Status Field
The two bytes of the Status Field (Status 0 and
Status 1) are shown in detail in Figure 8-3 In a 16-bit
wide interface these two bytes will combine to form
one word The 82595FX provides this field for each
incoming frame
8 2 RCV Ring Buffer Operation
The 82595FX RCV Ring Buffer operation is illustrat-
ed in Figure 8-4 The 82595FX copies received
frames sequentially into the RCV Buffer area of the
local memory The CPU processes these frames by
copying the frames from the local memory After a
frame is processed the CPU updates the 82595FX’s
Stop Register to point to the last location processed
This indicates that the RCV Buffer memory which
precedes the value programmed in the Stop Regis-
ter is now free area (it has been processed by the
CPU) When the 82595FX reaches the end of the
RCV Buffer (the Upper Limit Register value) it will
now wrap around back to the beginning of the buff-
er and continue to copy RCV frames into the buffer
beginning at the value pointed to by the Lower Limit
Register The 82595FX will continue to copy frames
into the RCV Buffer area as long as it does not reach
the address pointed to by the Stop Register (if this
does occur the 82595FX stops copying the frames
into memory and issues an Interrupt to the CPU) As
the CPU processes additional incoming frames the
Stop Register value continues to be moved This ac-
tion allows the CPU to keep ahead of the incoming
frames and allows the Ring Buffer to be continually
recycled as the memory space consumed by an in-
coming frame is reused as that frame is processed
7
6
5
4
3
2
1
0
SRT FRM X
X
1
X
X
IA MCH
RCLD Status 0
TYP LEN 0 RCV OK LEN ERR CRC ERR ALG ERR
0
OVR RN Status 1
Figure 8-3 RCV Status Field
Figure 8-4 82595FX RCV Ring Buffer Operation
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