82802AB Datasheet, PDF (38/53 Pages) Intel Corporation – Firmware Hub (FWH)

Intel^® 82802AB/AC Firmware Hub
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5.2.3.2. Signal Timing Parameters
Table 12. Signal Timing Parameters
Symbol
TCHQV
TCHQX
TCHQZ
TAVCH
TDVCH
TCHAX
TCHDX
TVSPL
TCSPL
TPLQZ
PCI
Symbol
Parameter
t_val
CLK to data out
t_on
CLK to active (float to active delay)
t_off
CLK to inactive (active to float delay)
t_su
Input setup time
t_h
Input hold time
t_rst
t_rst-clk
t_rst-off
Reset active time after power stable
Reset active time after CLK stable
Reset active to output float delay
Condition
Min.
2
2
7
0
1
100
Max. Units Notes
11
ns
1
ns
2
28
ns
2
ns
3
ns
3
ms
µs
48
ns
2
Note:
1. Minimum and maximum times have different loads. See PCI spec.
2. For purposes of active/float timing measurements, the Hi-Z or Off state is defined as that in which
the total current delivered through the component pin is less than or equal to the leakage current
specification.
3. This parameter applies to any input type (excluding CLK).
Figure 8. Output Timing Parameters
CLK
V_test
T_val
V_th
V_tl
FWH[3:0]
(Valid Output Data)
FWH[3:0]
(Float Output Data)
T_on
T_off
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Datasheet