80186 Datasheet, PDF (32/33 Pages) Intel Corporation – HIGH-INTEGRATION 16-BIT MICROPROCESSORS

80186 80188
INSTRUCTION SET SUMMARY (Continued)
Function
Format
PROCESSOR CONTROL
CLC e Clear carry
CMC e Complement carry
STC e Set carry
CLD e Clear direction
STD e Set direction
CLI e Clear interrupt
STI e Set interrupt
HLT e Halt
WAIT e Wait
LOCK e Bus lock prefix
ESC e Processor Extension Escape
NOP e No Operation
11111000
11110101
11111001
11111100
11111101
11111010
11111011
11110100
10011011
11110000
1 1 0 1 1 T T T mod LLL r m
(TTT LLL are opcode to processor extension)
10010000
80186
Clock
Cycles
80188
Clock
Cycles
Comments
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
6
6
if TEST e 0
2
3
6
6
3
3
Shaded areas indicate instructions not available in 8086 8088 microsystems
NOTE
Clock cycles shown for byte transfers for word operations add 4 clock cycles for each memory transfer
FOOTNOTES
The Effective Address (EA) of the memory operand
is computed according to the mod and r m fields
if mod e 11 then r m is treated as REG field
if mod e 00 then DISP e 0 disp-low and disp-high are absent
if mod e 01 then DISP e disp-low sign-extended to 16-bits disp-high
is absent
if mod e 10 then DISP e disp-high disp-low
if r m e 000 then EA e (BX) a (SI) a DISP
if r m e 001 then EA e (BX) a (DI) a DISP
if r m e 010 then EA e (BP) a (SI) a DISP
if r m e 011 then EA e (BP) a (DI) a DISP
if r m e 100 then EA e (SI) a DISP
if r m e 101 then EA e (DI) a DISP
if r m e 110 then EA e (BP) a DISP
if r m e 111 then EA e (BX) a DISP
DISP follows 2nd byte of instruction (before data if
required)
except if mod ^e 00 and r m ^e 110 then EA ^e
disp-high disp-low
EA calculation time is 4 clock cycles for all modes
and is included in the execution times given whenev-
er appropriate
Segment Override Prefix
0
0
1
reg
1
1
0
reg is assigned according to the following
reg
Segment
Register
00
ES
01
CS
10
SS
11
DS
REG is assigned according to the following table
16-Bit (w ^e 1)
000 AX
001 CX
010 DX
011 BX
100 SP
101 BP
110 SI
111 DI
8-Bit (w ^e 0)
000 AL
001 CL
010 DL
011 BL
100 AH
101 CH
110 DH
111 BH
The physical addresses of all operands addressed
by the BP register are computed using the SS seg-
ment register The physical addresses of the desti-
nation operands of the string primitive operations
(those addressed by the DI register) are computed
using the ES segment which may not be overridden
32
32