82540EP Datasheet, PDF (30/46 Pages) Intel Corporation – 82540EP Gigabit Ethernet Controller

82540EP — Networking Silicon
Figure 8. TVAL Test Load (PCI 5 V Signaling Environment)
Pin
Test
1/2 inch max.
Point
50 pF
4.5.2
NOTE: Note: 50 pF load used for maximum times. Minimum times are specified with 0 pF load.
Link Interface Timing
Table 17. Rise and Fall Times
Symbol
Parameter
TR
Clock rise time
TF
Clock fall time
TR
Data rise time
TF
Data fall time
Condition
0.8 V to 2.0 V
2.0 V to 0.8 V
0.8 to 2.0 V
2.0 V to 0.8 V
Min
Max
Unit
0.7
ns
0.7
ns
0.7
ns
0.7
ns
Figure 9. Link Interface Rise/Fall Timing
2.0 V
0.8 V
TR
TF
24