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X930A Datasheet, PDF (21/38 Pages) Intel Corporation – UNIVERSAL SERIAL BUS MICROCONTROLLER
8x930Ax UNIVERSAL SERIAL BUS (USB) MICROCONTROLLER
Symbol
TAVDV2
Table 11. AC Characteristics at Operating Conditions (Continued)
Parameter
CPU Frequency CPU Frequency (FCLK) Variable
@ 12 MHz
(M, N = 0)
Min
Max
Address (P2) Valid to Valid
Data/Instruction In
118.66
(2+M+N)TCLK
– 48
Units
ns
(3, 6)
TAVDV3
Address (P2) Valid to Valid
Instruction In
23.33
TAVRL (5) Address Valid to RD# or PSEN#
Low
40.33
(1+M)TCLK – 46
TAVWL1
Address (P0) Valid to WR# Low
40.33
(1+M)TCLK – 46
TAVWL2
Address (P2) Valid to WR# Low
66.33
(1+M)TCLK – 17
TWHQX
Data Hold after WR# High
28.66
0.5 TCLK – 13
TQVWH
Data Valid to WR# High
68.33
(1+N)TCLK –15
TWHAX
WR# High to Address Hold
70.33
TCLK – 13
NOTES:
1. Refer to Table 8 on page 12 for CPU frequencies vs. XTAL1 frequencies.
2. XTAL1 frequency is ± 0.25% for full speed and ± 1.5% for low speed.
3. M= 0,1 is the extended ALE state.
4. At 50° C, TLLAX = 8 ns
5. Specifications for PSEN# are identical to those for RD#.
6. N= 0,1,2,3 is the RD#/PSEN#/WR# wait state.
(1+N)TCLK – 60
ns (6)
ns (3)
ns (3)
ns (3)
ns
ns (6)
ns
ADVANCE INFORMATION
17