X930A Datasheet, PDF (16/38 Pages) Intel Corporation – UNIVERSAL SERIAL BUS MICROCONTROLLER

8x930Ax UNIVERSAL SERIAL BUS (USB) MICROCONTROLLER
5.1 Operating Frequencies
Table 8. Frequency Selection and Operating Frequency
PLLSEL2 PLLSEL1 PLLSEL0
Pin 43
Pin 42
Pin 44
USB Rate
(Low
Speed
or Full
Speed)
8x930Ax
Internal
Frequency
for CPU
and
Peripherals
(F_CLK)
(5)
XTAL1
External
Frequency
(F_OSC)
Number of
XTAL1
Clocks
(T_OSC)
in One
StateTime
(4)
Comments
0
0
1
1.5 Mbps
3 MHz
6 MHz 2 T_OSC/state PLL Off
(LS)
1
0
0
1.5 Mbps 6 MHz (3)
12 MHz 2 T_OSC/state PLL Off
(LS)
1
1
0
12 Mbps 12 MHz (3)
12 MHz 1 T_OSC/state PLL On
(FS)
NOTES:
1. Other PLLSELx combinations are not valid.
2. The sampling rate is 4X the USB rate.
3. The 8x930Ax CPU and peripherals frequency is 3 MHz (low clock mode) until firmware disables the
low clock mode.
4. The number of XTAL clocks in one state depends on the PLLSELx selections. When the CPU is oper-
ating at low clock mode (3 MHz), there are four T_OSC per state for the PLLSEL2:1:0 = 100 and 110.
5. The AC timing specification (Table 11) defines the following symbol: CPU frequency = F_CLK = 1/T_CLK.
XTAL1
F_OSC
(6 or 12 MHz)
XTAL2
PD
PCON.1
(Powerdown)
Clock
Generator
Internal Clock
÷2 0
F_CLK
0
1
1
3 MHz
On-chip
Peripherals
CPU
210
PLLSEL
LC
PCON.5
(Low-clock Mode)
Figure 5. Clock Circuit
IDL
PCON.0
(Idle Mode)
A5135-01
12
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