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GDPXA255A0E400 Datasheet, PDF (12/40 Pages) Intel Corporation – Electrical, Mechanical, and Thermal Specification
Package Information
Table 3. Pin and Signal Descriptions for the PXA255 Processor (Sheet 4 of 9)
Pin Name
Type
Signal Descriptions
Reset State
Sleep State
L_DD[9]/
GPIO[67]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
MMC chip select 0. (output) Chip select 0 for the MMC
controller.
Pulled High -
Note[1]
L_DD[10]/
GPIO[68]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
MMC chip select 1. (output) Chip select 1 for the MMC
controller.
Pulled High -
Note[1]
L_DD[11]/
GPIO[69]
LCD display data. (output) Transfers pixel information
ICOCZ from the LCD controller to the external LCD panel.
MMC clock. (output) Clock for the MMC controller.
Pulled High -
Note[1]
L_DD[12]/
GPIO[70]
LCD display data. (output) Transfers pixel information
ICOCZ from the LCD controller to the external LCD panel.
RTC clock. (output) Real-time clock 1 Hz tick.
Pulled High -
Note[1]
L_DD[13]/
GPIO[71]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
3.6864 MHz clock. (output) Output from 3.6864 MHz
oscillator.
Pulled High -
Note[1]
L_DD[14]/
GPIO[72]
LCD display data. (output) Transfers pixel information
ICOCZ from the LCD controller to the external LCD panel.
Pulled High -
Note[1]
32 kHz clock. (output) Output from the 32 kHz oscillator.
L_DD[15]/
GPIO[73]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
Memory Controller grant. (output) Notifies an external
device it has been granted the system bus.
Pulled High -
Note[1]
L_FCLK/
GPIO[74]
LCD frame clock. (output) Indicates the start of a new
ICOCZ frame. Also referred to as Vsync.
Pulled High -
Note[1]
L_LCLK/
GPIO[75]
LCD line clock. (output) Indicates the start of a new line. Pulled High -
ICOCZ Also referred to as Hsync.
Note[1]
L_PCLK/
GPIO[76]
ICOCZ LCD pixel clock. (output) Clocks valid pixel data into the Pulled High -
LCD line-shift buffer.
Note[1]
L_BIAS/
GPIO[77]
AC bias drive. (output) Notifies the panel to change the
ICOCZ polarity for some passive LCD panel. For TFT panels,
this signal indicates valid pixel data.
Pulled High -
Note[1]
Full Function UART Pins
FFRXD/
GPIO[34]
Full function UART receive. (input)
ICOCZ MMC chip select 0. (output) Chip select 0 for the MMC
Controller.
Pulled High -
Note[1]
FFTXD/
GPIO[39]
Full Function UART transmit. (output)
ICOCZ MMC chip select 1. (output) Chip select 1 for the MMC
Controller.
Pulled High -
Note[1]
FFCTS/
GPIO[35]
ICOCZ Full function UART clear-to-send. (input)
Pulled High -
Note[1]
FFDCD/
GPIO[36]
ICOCZ Full function UART data-carrier-detect. (input)
Pulled High -
Note[1]
FFDSR/
GPIO[37]
ICOCZ Full function UART data-set-ready. (input)
Pulled High -
Note[1]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
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Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification