English
Language : 

GDPXA255A0E400 Datasheet, PDF (11/40 Pages) Intel Corporation – Electrical, Mechanical, and Thermal Specification
Package Information
Table 3. Pin and Signal Descriptions for the PXA255 Processor (Sheet 3 of 9)
Pin Name
Type
Signal Descriptions
Reset State
Sleep State
L_DD[15]/
GPIO[73]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
Memory controller grant. (output) Notifies an external
device that it has been granted the system bus.
Pulled High -
Note[1]
MBGNT/
GP[13]
ICOCZ Memory controller grant. (output) Notifies an external Pulled High -
device that it has been granted the system bus.
Note[1]
MBREQ/
GP[14]
Memory controller alternate bus master request.
ICOCZ (input) Allows an external device to request the system
bus from the memory controller.
Pulled High -
Note[1]
PCMCIA/CF Control Pins
nPOE/
GPIO[48]
ICOCZ PCMCIA output enable. (output) Reads from PCMCIA Pulled High -
memory and to PCMCIA attribute space.
Note[1]
nPWE/
GPIO[49]
PCMCIA write enable. (output) Performs writes to
ICOCZ PCMCIA memory and to PCMCIA attribute space. Also
used as the write enable signal for variable latency I/O.
Pulled High -
Note[1]
nPIOW/
GPIO[51]
ICOCZ
PCMCIA I/O write. (output) Performs write transactions
to PCMCIA I/O space.
Pulled High -
Note[1]
nPIOR/
GPIO[50]
ICOCZ PCMCIA I/O read. (output) Performs read transactions Pulled High -
from PCMCIA I/O space.
Note[1]
nPCE[2]/
GPIO[53]
ICOCZ
PCMCIA card enable 2. (output) Selects a PCMCIA
card. nPCE[2] enables the high byte lane and nPCE[1]
enables the low byte lane.
MMC clock. (output) Clock signal for the MMC controller.
Pulled High -
Note[1]
nPCE[1]/
GPIO[52]
PCMCIA card enable 1. (outputs) Selects a PCMCIA
ICOCZ card. nPCE[2] enables the high byte lane and nPCE[1]
enables the low byte lane.
Pulled High -
Note[1]
nIOIS16/
GPIO[57]
IO Select 16. (input) Acknowledge from the PCMCIA
ICOCZ card that the current address is a valid 16 bit wide I/O
address.
Pulled High -
Note[1]
nPWAIT/
GPIO[56]
PCMCIA wait. (input) Driven low by the PCMCIA card to Pulled High -
ICOCZ extend the length of the transfers to/from the PXA255
Note[1]
processor processor.
PSKTSEL/
GPIO[54]
ICOCZ
PCMCIA socket select. (output) Used by external
steering logic to route control, address, and data signals
to one of the two PCMCIA sockets. When PSKTSEL is
low, socket zero is selected. When PSKTSEL is high,
socket one is selected. Has the same timing as the
address bus.
Pulled High -
Note[1]
nPREG/
GPIO[55]
PCMCIA register select. (output) Indicates that the
ICOCZ target address on a memory transaction is attribute
space. Has the same timing as the address bus.
Pulled High -
Note[1]
LCD Controller Pins
L_DD(7:0)/
GPIO[65:58]
LCD display data. (outputs) Transfers pixel information Pulled High -
ICOCZ from the LCD Controller to the external LCD panel.
Note[1]
L_DD[8]/
GPIO[66]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
Memory controller alternate bus master request.
(input) Allows an external device to request the system
bus from the Memory Controller.
Pulled High -
Note[1]
Note [3]
Note [3]
Note [3]
Note [5]
Note [5]
Note [5]
Note [5]
Note [5]
Note [5]
Note [5]
Note [5]
Note [5]
Note [5]
Note [3]
Note [3]
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
11