IA8044 Datasheet, PDF (7/49 Pages) InnovASIC, Inc – SDLC COMMUNICATIONS CONTROLLER

IA8044/IA8344
SDLC COMMUNICATIONS CONTROLLER
Data Sheet
Bit Addressable Memory
Both the internal RAM and the Special Function Registers have locations that are bit addressable in
addition to the byte addressable locations.
SFR Bit Addressable Locations
Byte Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Register
F0h
F7h F6h F5h F4h F3h F2h F1h F0h B
E0h
E7h E6h E5h E4h E3h E2h E1h E0h ACC
D8h
DFh DEh DDh DCh DBh DAh D9h D8h NSNR
D0h
D7h D6h D5h D4h D3h D2h D1h D0h PSW
C8h
CFh CEh CDh CCh CBh CAh C9h C8h STS
B8h
-
-
-
BCh BBh BAh B9h B8h IP
B0h
B7h B6h B5h B4h B3h B2h B1h B0h P3
A8h
AFh
-
- ACh ABh AAh A9h A8h IE
A0h
A7h A6h A5h A4h A3h A2h A1h A0h P2
90h
97h 96h 95h 94h 93h 92h 91h 90h P1
88h
8Fh 8Eh 8Dh 8Ch 8Bh 8Ah 89h 88h TCON
80h
87h 86h 85h 84h 83h 82h 81h 80h P0
Internal RAM Bit Addressable Locations
Byte Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
30h-BFh
Upper Internal Ram locations
2Fh
7Fh 7Eh 7Dh 7Ch 7Bh 7Ah 79h 78h
2Eh
77h 76h 75h 74h 73h 72h 71h 70h
2Dh
6Fh 6Eh 6Dh 6Ch 6Bh 6Ah 69h 68h
2Ch
67h 66h 65h 64h 63h 62h 61h 60h
2Bh
5Fh 5Eh 5Dh 5Ch 5Bh 5Ah 59h 58h
2Ah
57h 56h 55h 54h 53h 52h 51h 50h
29h
4Fh 4Eh 4Dh 4Ch 4Bh 4Ah 49h 48h
28h
47h 46h 45h 44h 43h 42h 41h 40h
27h
3Fh 3Eh 3Dh 3Ch 3Bh 3Ah 39h 38h
26h
37h 36h 35h 34h 33h 32h 31h 30h
25h
2Fh 2Eh 2Dh 2Ch 2Bh 2Ah 29h 28h
24h
27h 26h 25h 24h 23h 22h 21h 20h
23h
1Fh 1Eh 1Dh 1Ch 1Bh 1Ah 19h 18h
22h
17h 16h 15h 14h 13h 12h 11h 10h
21h
0Fh 0Eh 0Dh 0Ch 0Bh 0Ah 09h 08h
20h
07h 06h 05h 04h 03h 02h 01h 00h
18h-1Fh
Register Bank 3
10h-17h
Register Bank 2
08h-0Fh
Register Bank 1
00h-07h
Register Bank 0
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innovASIC
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ENG210010112-00
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