IA63484 Datasheet, PDF (26/32 Pages) InnovASIC, Inc – Advanced CRT Controller

IA63484
Advanced CRT Controller
Data Sheet
AC Characteristics (continued):
Frame Memory Read / Write Cycle Timing:
Item
9.8 MHz Version
Symbol
Unit
Min
Max
as_n "Low" Level Pulse Width
t _PWASL
20
ns
Memory Address Hold Time 2
t_MAH2
5
ns
as_n Delay Time 1
t _ASD1
50
ns
as_n Delay Time 2
t _ASD2
5
40
ns
Memory Address Delay Time
t_MAD
10
50
ns
Memory Address Hold Time 1
t_MAH1
15
ns
Memory Address Turn Off Time (A to Z)
t_MAAZ
35
ns
Memory Read Data Setup Time
t_MRDS
30
ns
Memory Read Data Hold Time
t_MRDH
0
ns
ma_ra Delay Time
t_MARAD
60
ns
ma_ra Delay Time
t_MARAH
5
ns
MCYC Delay Time
t_MCYCD
5
40
ns
mrd Delay Time
t_MRDD
50
ns
mrd Hold Time
t_MRH
5
ns
draw_n Delay Time
t_DRWD
50
ns
draw_n Hold Time
t_DRWH
5
ns
Memory Write Data Delay Time
t_MWDD
50
ns
Memory Write Data Hold Time
t_MWDH
5
ns
Memory Address Setup Time 1
t_MAS1
10
ns
Memory Address Setup Time 2
t_MAS2
10
ns
NOTE: t _MAD is independent of clk_2 operation frequency (f) and timing of t_ASD2 and t _MAS1
Copyright © 2001
innovASIC
The End of Obsolescence™
ENG 21101041200
Page 26 of 32
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