IA63484 Datasheet, PDF (19/32 Pages) InnovASIC, Inc – Advanced CRT Controller

IA63484
Advanced CRT Controller
Data Sheet
COMMAND TRANSFER MODES:
Program Transfer and DMA Transfer are the two modes used to transfer commands and associated
parameters issued by the MPU to the ACRTC.
Program Transfer:
Program transfer occurs when the MPU specifies the FIFO entry address and then writes operation
code/parameters to the write FIFO under program control. The MPU writes are normally
synchronized with ACRTC FIFO status by software polling or interrupts.
Software Polling (WFR, WFE interrupts disabled):
• MPU program checks the SR for WFR=1, and then writes 1-word operation code/parameters, or
• MPU program checks the SR for write WFE=1, and the writes 1- to 8-word operation
code/parameters.
Interrupt Driven (WFR, WFE interrupts enabled):
• MPU WFR interrupt service routine writes 1-word operation code/parameters, or
• MPU WFE interrupt service routine writes 1- to 8-word operation code/parameters.
DMA Transfer:
Commands and parameters can be transferred from MPU system memory by an external DMAC.
The MPU initiates and terminates command DMA transfer mode under software control.
Command DMA can also be terminated by assertion of the done_n input.
Using command DMA transfer, the ACRTC will issue cycle stealing DMA requests to the DMAC
when the write FIFO is empty. The DMA data is automatically sent from system memory to the
ACRTC write FIFO regardless of the contents of the address register.
Command Function:
The ACRTC commands are divided into three groups, register access commands, data transfer
commands, and graphic drawing commands.
Register access commands:
Access to the drawing processor drawing parameter registers and the pattern RAM is through the
read/write FIFOs using register access commands. When writing register access commands to an
initially empty write FIFO, the MPU does not have to synchronize to write FIFO status. The
ACRTC can fetch and execute these commands faster than the MPU can issue them.
Data transfer commands:
Data is moved between the host system memory and the frame buffer, or within the frame buffer
using the data transfer commands. Before issuing these commands, a physical 20-bit frame buffer
address must be specified in the RWP (read/write pointer) drawing parameter register.
Copyright © 2001
innovASIC
The End of Obsolescence™
ENG 21101041200
Page 19 of 32
www.innovasic.com
Customer Support:
1−888−824−4184