TLE9877QXA20_15 Datasheet, PDF (95/122 Pages) Infineon Technologies AG – Microcontroller with LIN and BLDC MOSFET Driver for Automotive Applications

TLE9877QXA20
Electrical Characteristics
1) The typical oscillator frequency is 5 MHz
2) V_DDC = 1.5 V, T_j = 25°C
3) Not subject to production test, specified by design.
4) This parameter is valid for PLL operation with an external clock source and thus reflects the real PLL performance.
29.4
Flash Memory
This chapter includes the parameters for the 64 kByte embedded flash module.
29.4.1 Flash Parameters
Table 28 Flash Characteristics¹⁾
V_S = 5.5 V to 28 V, T_j = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Programming time per 128 byte page
Erase time per sector/page
Data retention time
Symbol
Min.
t_PR
–
t_ER
–
t_RET
20
Values
Typ. Max.
3²⁾
3.5
4²⁾
4.5
–
–
Unit
ms
ms
years
Note /
Number
Test Condition
3V < V_S < 28V
3V < V_S < 28V
1,000 erase /
program cycles
P_4.1.1
P_4.1.2
P_4.1.3
Data retention time
t_RET
50
–
–
years 1,000 erase / P_4.1.9
program cycles
T_j = 30°C³⁾
Flash erase endurance for user sectors N_ER
30
–
–
kcycles Data retention P_4.1.4
time 5 years
Flash erase endurance for security
N_SEC
10
–
–
cycles ⁴⁾Data retention P_4.1.5
pages
time 20 years
Drain disturb limit
N_DD
32
–
–
kcycles ⁵⁾
1) Not subject for production test, specified by design.
P_4.1.6
2) Programming and erase times depend on the internal Flash clock source. The control state machine needs a few system
clock cycles. The requirement is only relevant for extremely low system frequencies.
3) Derived by extrapolation of lifetime tests.
4) Temperature: 25 °C
5) This parameter limits the number of subsequent programming operations within a physical sector without a given page in
this sector being (re-)programmed. The drain disturb limit is applicable if wordline erase is used repeatedly. For normal
sector erase/program cycles this limit will not be violated. For data sectors the integrated EEPROM emulation firmware
routines handle this limit automatically, for wordline erases in code sectors (without EEPROM emulation) it is
recommended to execute a software based refresh, which may make use of the integrated random number generator
NVMBRNG to statistically start a refresh.
Data Sheet
95
Rev. 1.0, 2015-04-30