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TLE9877QXA20_15 Datasheet, PDF (90/122 Pages) Infineon Technologies AG – Microcontroller with LIN and BLDC MOSFET Driver for Automotive Applications
29.2.3 VDDEXT Voltage Regulator (5.0V) Parameters
TLE9877QXA20
Electrical Characteristics
Table 24 Electrical Characteristics
VS = 5.5 V to 28 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
Number
Specified output current
IVDDEXT
0
–
Specified output current
IVDDEXT
0
–
Required decoupling capacitance CVDDEXT1 0.1 –
20 mA –
P_2.3.1
40
mA 1)
P_2.3.21
2.2 µF 3) 2)ESR < 1 Ω; the P_2.3.22
specified capacitor
value is a typical
value.
Required buffer capacitance for CVDDEXT2 1
stability (load jumps)
–
2.2 µF 3)2)the specified
P_2.3.20
capacitor value is a
typical value.
Output voltage including line and VDDEXT
load regulation
4.9 5.0 5.1 V
3) Iload<20mA; VS >
5.5V
P_2.3.3
Output voltage including line and VDDEXT
load regulation
4.8 5.0 5.2 V
Iload<40mA; VS >
5.5V
P_2.3.23
Output drop @ Active Mode
VS-VDDEXT
Output drop @ Active Mode
VS-VDDEXT
Load regulation @ Active Mode
Line regulation @ Active Mode
Power supply ripple rejection @
Active Mode
VDDEXTLOR -50
VVDDEXTLIR -50
PSSRVDDEXT 50
50 +300 mV 3) Iload < 20mA;
3V < VS < 5.0V
P_2.3.4
–
+400 mV Iload < 40mA;
3V < VS < 5.0V
P_2.3.14
– 50 mV 2 ... 40mA; C =200nF P_2.3.5
–
50
mV VS = 5.5 ... 28V
P_2.3.6
––
dB 3) VS = 13.5V; f =0 ... P_2.3.7
1KHz; Vr=2Vpp
Overvoltage detection
VVDDEXTOV 5.18 –
5.4 V
VS > 5.5V
Overvoltage detection filter time tFILT_VDDEXT –
735 –
µs
3)4)
P_2.3.8
P_2.3.24
Voltage OK detection range
Voltage stable detection range5)
OV
VVDDEXTOK –
3
∆VVDDEXTST - 220 –
–
V
3)
+ 220 mV 3)
P_2.3.25
P_2.3.26
Undervoltage trigger
B
VVDDEXTUV 2.6
2.8 3.0
V
6)
Overcurrent diagnostic
Overcurrent diagnostic filter time
Overcurrent diagnostic shutdown
time
IVDDEXTOC 50
tFILT_VDDCOC –
tFILT_VDDCOC –
_SD
– 160 mA –
27 –
µs
3)4)
290 –
µs
3)4)
1) This use case requires the reduced utilization of VDDP output current by 20 mA, see P_2.1.22.
2) Ceramic capacitor.
3) Not subject to production test, specified by design.
4) This filter time and its variation is derived from the time base tLP_CLK = 1 / fLP_CLK.
P_2.3.9
P_2.3.10
P_2.3.27
P_2.3.28
Data Sheet
90
Rev. 1.0, 2015-04-30