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TLD5541-1QV Datasheet, PDF (9/82 Pages) Infineon Technologies AG – H-Bridge DC/DC Controller with SPI Interface
H-Bridge DC/DC Controller with SPI Interface
TLD5541-1QV
Pin Configuration
Pin
Symbol
46
IVCC
Inputs and Outputs
37
LHI
23
TEST1
25
TEST2
41
EN/INUVLO
35
FREQ
34
SYNC
24
PWMI
13
FBH
14
FBL
3
BST1
10
BST2
17
SWCS
18
SGND
42
IIN1
43
IIN2
19
COMP
38
SOFT_START
I/O 1)
O
Function
Internal LDO output;
Used for internal biasing and gate driver supply. Bypass with external
capacitor close to the pin. Pin must not be left open.
I PD Limp Home Input Pin;
Used to enter in Limp Home state during Fail Safe condition.
-
Test Pin;
Used for Infineon end of line test, connect to GND in application
-
Test Pin;
Used for Infineon end of line test, connect to GND in application
I PD Enable/Input Under Voltage Lock Out;
Used to put the device in a low current consumption mode, with additional
capability to fix an undervoltage threshold via external components. Pin
must not be left open.
I
Frequency Select Input;
Connect external resistor to GND to set frequency.
I PD Synchronization Input;
Apply external clock signal for synchronization
I PD Control Input; Digital input 5Vor 3.3V.
I
Output current Feedback Positive;
Non inverting Input (+)
I
Output current Feedback Negative;
Inverting Input (-)
IO
Bootstrap capacitor;
Used for internal biasing and to drive the Highside Switch HSGD1. Bypass
to SWN1 with external capacitor close to the pin. Pin must not be left open.
IO
Bootstrap capacitor;
Used for internal biasing and to drive the Highside Switch HSGD2. Bypass
to SWN2 with external capacitor close to the pin. Pin must not be left open.
I
Current Sense Input;
Inductor current measurement - Non Inverting Input (+)
I
Current Sense Ground;
Inductor current sense - Inverting Input (-)
Route as Differential net with SWCS on the Layout
I
Input Current Monitor Positive;
Non Inverting Input (+), connect to VIN if input current monitor is not
needed
I
Input Current Monitor Negative;
Inverting Input (-), connect to VIN if input current monitor is not needed
O
Compensation Network Pin;
Connect R and C network to pin for stability phase margin adjustment
O
Softstart configuration Pin;
Connect a capacitor CSOFT_START to GND to fix a soft start ramp default
time.
Data Sheet
9
Rev. 1.0, 2016-05-20