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TLD5541-1QV Datasheet, PDF (73/82 Pages) Infineon Technologies AG – H-Bridge DC/DC Controller with SPI Interface
H-Bridge DC/DC Controller with SPI Interface
TLD5541-1QV
Serial Peripheral Interface (SPI)
Table 12-3 Register description (cont’d)
Register name Field
Bits Type Purpose
CURRMON
LEDCURR
INCURR
EOMON
SOMON
REGUSETMON REGUMODFB
1:0 r
3:2 r
4r
5 r/w
3:2 r
Current Monitor Register
Status of the LED Current bits:
00B , (default) LED current between Target and +25%
01B , LED current above +25% of Target
10B , LED current between Target and -25%
11B , LED current below -25% of Target
Status of the Input Current bits:
00B , (default) Input current between 75% and 90% of Limit
01B , Input current between 90% and the Limit
10B , Input current between 60% and 75% of Limit
11B , Input current below 60% of Limit
End of LED/Input Current Monitoring bit:
0B , (default) Current monitoring routine not completed,
not successfully performed or never run.
1B , Current Monitor routine successfully performed (is
reset to 0B when SOMON is set to 1B)
Start of LED/Input Current Monitoring bit:
0B , (default) Current monitor routine not started
1B , Start of the current monitor routine
Regulation Setup And Monitor Register
Feedback of Regulation Mode bits:
01B , (default) Buck
10B , Boost
11B , Buck-Boost
Data Sheet
73
Rev. 1.0, 2016-05-20