TLD5541-1QV Datasheet, PDF (24/82 Pages) Infineon Technologies AG – H-Bridge DC/DC Controller with SPI Interface

H-Bridge DC/DC Controller with SPI Interface
TLD5541-1QV
Regulator Description
• Transistor M1 and M3 provides a path between V_IN and ground through L_OUT in one direction (Driven by top
and bottom gate drivers HSGD1 and LSGD2).
• Transistor M2 and M4 provides a path between VOUT and ground through L_OUT in the other direction (Driven
by top and bottom gate drivers HSGD2 and LSGD1).
• Nodes SWN1, SWN2, voltage across R_SWCS, input and load currents are also monitored by the TLD5541-1QV.
BOOST
MODE
BUCK-BOOST
MODE
BUCK
MODE
M1
ON
PWM
PWM
M2
OFF
PWM
PWM
M3
PWM
PWM
OFF
M4
PWM
PWM
ON
Figure 8 4 switches H-Bridge architecture Transistor Status summary
V_IN
V_OUT
M1
HSGD1
SWN1
L_OUT
M4
HSGD2
SWN2
M2
LSGD1
M3
LSGD2
R_SWCS
Figure 9 4 switches H-Bridge architecture overview
6.4.1
Boost mode (V_IN < V_OUT)
• M1 is always ON, M2 is always OFF
• Every cycle M3 turns ON first and inductor current is sensed (peak current control)
• M3 stays ON until the upper reference threshold is reached across R_SWCS (Energizing)
• M3 turns OFF, M4 turns ON until the end of the cycle (Recirculation)
• Switches M3 and M4 alternate, behaving like a typical synchronous boost Regulator (see Figure 10)
Data Sheet
24
Rev. 1.0, 2016-05-20