TLD5541-1QV Datasheet, PDF (30/82 Pages) Infineon Technologies AG – H-Bridge DC/DC Controller with SPI Interface

H-Bridge DC/DC Controller with SPI Interface
TLD5541-1QV
Regulator Description
I F1
I F2
External
Mosfet
Closure
No current at the Load
during F.O.D.
EOMFS
SPI COMMANDS ^TPREP
SPI CSN
LED N. INITIAL LED N. FINAL
+ SO MF
I_L
T_PREP
T_DISCHARGE
Break
Low
I_{SwLi m}
V_OUT
V_{INIT IAL}
V_{FIN AL}
Figure 16
Normal Switching Fast Output Discharge ^Current
activity F1+F2 on
Recovery
Fast Output Discharge timing diagram
Normal Switching
activity F1 on
If the discharge current limit I_SwLim needs to be reduced, the MFSSETUP1.ILIM_HALF_MFS bit can be used to cut
it in half (only during the F.D. phase and not in normal operation), see SPI Chapter for further details Chapter 12.6.
Setting the EA_IOUT_MFS bit will reduce (only during the F.D. phase) the saturation current of the error amplifier
A6 that discharges the Comp capacitor.
Once V_OUT reaches the desired target, the current recovery phase brings I_L from a negative value back to 0 A.
When the current recovery phase has ended, an internal SPI flag (MFSSETUP1.EOMFS) is set to HIGH and the
device stays in “Brake-Low condition” (both Lowside gatedrivers = ON) until the programmed preparation time
(MFSSETUP2.MFSDLY) expires and the TLD5541-1QV starts automatically switching again. Figure 16 displays
one Fast Output Discharge cycle.
The effective C_out discharge current is smaller than the Inductor current and it depends on the application
condition, see Equation (7).
I_DISCH
=
V_i
V_o +V_i
⋅
I_swLim −
V_o
2Lf_SW
⋅ _{⎜⎜⎝⎛Vi}
V_i
+V_o
⎟⎟⎠⎞²
(7)
Sequence of operations to perform a Fast Output Discharge
In order to perform a F.D operation, the user has to :
• Set via SPI an adequate Preparation Time
• Send via SPI to MFSSETUP1.LEDCHAIN the Ratio Denominator.
• Send via SPI to MFSSETUP1.LEDCHAIN the Ration Numerator + SOMFS
• Adjust the Floating switches to the new configuration
Data Sheet
30
Rev. 1.0, 2016-05-20