XC2786X Datasheet, PDF (74/120 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2786X
XC2000 Family Derivatives
Electrical Parameters
Table 12 Operating Condition Parameters (cont’d)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
External Pin Load
Capacitance
C_L
–
20
Voltage Regulator Buffer C_EVRM 1.0 –
Capacitance for DMP_M
–
pF Pin drivers in
default mode⁶⁾
4.7
µF ⁷⁾
Voltage Regulator Buffer C_EVR1
Capacitance for DMP_1
0.47 –
2.2 µF One for each
supply pin⁷⁾
Operating frequency
f_SYS
–
–
80
MHz ⁸⁾
Ambient temperature
T_A
–
–
–
°C See Table 1
1) If both core power domains are clocked, the difference between the power supply voltages must be less than
10 mV. This condition imposes additional constraints when using external power supplies.
Do not combine internal and external supply of different core power domains.
Do not supply the core power domains with two independent external voltage regulators. The simplest method
is to supply both power domains directly via a single external power supply.
2) Performance of pad drivers, A/D Converter, and Flash module depends on V_DDP.
If the external supply voltage V_DDP becomes lower than the specified operating range, a power reset must be
generated. Otherwise, the core supply voltage V_DDI may rise above its specified operating range due to
parasitic effects.
This power reset can be generated by the on-chip SWD. If the SWD is disabled the power reset must be
generated by activating the PORST input.
3) Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin
exceeds the specified range: V_OV > V_IHmax (I_OV > 0) or V_OV < V_ILmin (I_OV < 0). The absolute sum of input
overload currents on all pins may not exceed 50 mA. The supply voltages must remain within the specified
limits. Proper operation under overload conditions depends on the application.
Overload conditions must not occur on pin XTAL1 (powered by V_DDI).
4) Not subject to production test - verified by design/characterization.
5) An overload current (I_OV) through a pin injects an error current (I_INJ) into the adjacent pins. This error current
adds to that pin’s leakage current (I_OZ). The value of the error current depends on the overload current and is
defined by the overload coupling factor K_OV. The polarity of the injected error current is reversed from the
polarity of the overload current that produces it.
The total current through a pin is |I_TOT| = |I_OZ| + (|I_OV| × K_OV). The additional error current may distort the input
voltage on analog inputs.
6) The timing is valid for pin drivers operating in default current mode (selected after reset). Reducing the output
current may lead to increased delays or reduced driving capability (C_L).
7) To ensure the stability of the voltage regulators the EVRs must be buffered with ceramic capacitors. Separate
buffer capacitors with the recomended values shall be connected as close as possible to each V_DDI pin to keep
the resistance of the board tracks below 2 Ω. Connect all V_DDI1 pins together.
The minimum capacitance value is required for proper operation under all conditions (e.g. temperature).
Higher values slightly increase the startup time.
8) The operating frequency range may be reduced for specific types of the XC2786X. This is indicated in the
device designation (…FxxL). 80-MHz devices are marked …F80L.
Data Sheet
72
V2.1, 2008-08