XC2786X Datasheet, PDF (101/120 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2786X
XC2000 Family Derivatives
Electrical Parameters
4.6.4 External Bus Timing
The following parameters specify the behavior of the XC2786X bus interface.
Table 27 CLKOUT Reference Signal
Parameter
Symbol
Min.
Limits
Max.
Unit Note / Test
Condition
CLKOUT cycle time
t₅
CC
40/25/12.5¹⁾
ns
CLKOUT high time
t₆
CC 3
–
ns
CLKOUT low time
t₇
CC 3
–
ns
CLKOUT rise time
t₈
CC –
3
ns
CLKOUT fall time
t₉
CC –
3
ns
1) The CLKOUT cycle time is influenced by the PLL jitter (given values apply to f_SYS = 25/40/80 MHz).
For longer periods the relative deviation decreases (see PLL deviation formula).
t₅
t₆
t₇
t₉
t₈
CLKOUT
MC_X_ EBCCLKOUT
Figure 21 CLKOUT Signal Timing
Note: The term CLKOUT refers to the reference clock output signal which is generated
by selecting f_SYS as the source signal for the clock output signal EXTCLK on pin
P2.8 and by enabling the high-speed clock driver on this pin.
Data Sheet
99
V2.1, 2008-08