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XC2786X Datasheet, PDF (113/120 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2786X
XC2000 Family Derivatives
Electrical Parameters
Table 34
Parameter
SSC Master/Slave Mode Timing for Lower Voltage Range
(Operating Conditions apply), CL = 50 pF
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Co
ndition
Master Mode Timing
Slave select output SELO active t1 CC
to first SCLKOUT transmit edge
Slave select output SELO inactive t2 CC
after last SCLKOUT receive edge
Transmit data output valid time
Receive data input setup time to
SCLKOUT receive edge
t3 CC
t4 SR
0
–
0.5 × –
tBIT
-13 –
48
–
1)
ns 2)
3)
ns 2)
16
ns
–
ns
Data input DX0 hold time from t5 SR -11 –
–
ns
SCLKOUT receive edge
Slave Mode Timing
Select input DX2 setup to first t10 SR 12
–
–
ns 4)
clock input DX1 transmit edge
Select input DX2 hold after last t11 SR 8
–
–
ns 4)
clock input DX1 receive edge
Data input DX0 setup time to
t12 SR 12
–
–
ns 4)
clock input DX1 receive edge
Data input DX0 hold time from t13 SR 8
–
–
ns 4)
clock input DX1 receive edge
Data output DOUT valid time
t14 CC 11
–
44
ns 4)
1) The maximum value further depends on the settings for the slave select output leading delay.
2) tSYS = 1/fSYS (= 12.5ns @ 80 MHz)
3) The maximum value depends on the settings for the slave select output trailing delay and for the shift clock
output delay.
4) These input timings are valid for asynchronous input signal handling of slave select input, shift clock input, and
receive data input (bits DXnCR.DSEN = 0).
Data Sheet
111
V2.1, 2008-08