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XC2786X Datasheet, PDF (114/120 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2786X
XC2000 Family Derivatives
Electrical Parameters
Master Mode Timing
t1
Select Output
SELOx
Inactive
Active
Clock Output
SCLKOUT
Data Output
DOUT
Data Input
DX0
First Transmit
Edge
t3
Receive
Edge
t4
t5
Data
valid
Transmit
Edge
t3
t2
Inactive
Last Receive
Edge
t4
t5
Data
valid
Slave Mode Timing
Select Input
DX2
t10
Inactive
Active
t11
Inactive
Clock Input
DX1
Data Input
DX0
Data Output
DOUT
First Transmit
Edge
Receive
Edge
t12
t13
Data
valid
t14
Transmit
Edge
t14
Last Receive
Edge
t12
t13
Data
valid
Transmit Edge: with this clock edge, transmit data is shifted to transmit data output.
Receive Edge: with this clock edge, receive data at receive data input is latched.
Drawn for BRGH.SCLKCFG = 00B. Also valid for for SCLKCFG = 01B with inverted SCLKOUT signa.l
USIC_SSC_TMGX.VSD
Figure 27 USIC - SSC Master/Slave Mode Timing
Note: This timing diagram shows a standard configuration where the slave select signal
is low-active and the serial clock signal is not shifted and not inverted.
Data Sheet
112
V2.1, 2008-08