XC2786X Datasheet, PDF (112/120 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2786X
XC2000 Family Derivatives
Electrical Parameters
4.6.5 Synchronous Serial Interface Timing
The following parameters are applicable for a USIC channel operated in SSC mode.
Note: These parameters are not subject to production test but verified by design and/or
characterization.
Table 33
Parameter
SSC Master/Slave Mode Timing for Upper Voltage Range
(Operating Conditions apply), C_L = 50 pF
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Co
ndition
Master Mode Timing
Slave select output SELO active t₁ CC
to first SCLKOUT transmit edge
Slave select output SELO inactive t₂ CC
after last SCLKOUT receive edge
Transmit data output valid time
Receive data input setup time to
SCLKOUT receive edge
t₃ CC
t₄ SR
0
–
0.5 × –
t_BIT
-6
–
31
–
1)
ns ²⁾
3)
ns
13
ns
–
ns
Data input DX0 hold time from t₅ SR -7
–
–
ns
SCLKOUT receive edge
Slave Mode Timing
Select input DX2 setup to first t₁₀ SR 7
–
–
ns ⁴⁾
clock input DX1 transmit edge
Select input DX2 hold after last t₁₁ SR 5
–
–
ns ⁴⁾
clock input DX1 receive edge
Data input DX0 setup time to
t₁₂ SR 7
–
–
ns ⁴⁾
clock input DX1 receive edge
Data input DX0 hold time from t₁₃ SR 5
–
–
ns ⁴⁾
clock input DX1 receive edge
Data output DOUT valid time
t₁₄ CC 8
–
29
ns ⁴⁾
1) The maximum value further depends on the settings for the slave select output leading delay.
2) t_SYS = 1/f_SYS (= 12.5 ns @ 80 MHz)
3) The maximum value depends on the settings for the slave select output trailing delay and for the shift clock
output delay.
4) These input timings are valid for asynchronous input signal handling of slave select input, shift clock input, and
receive data input (bits DXnCR.DSEN = 0).
Data Sheet
110
V2.1, 2008-08