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TLE8262-2E Datasheet, PDF (67/94 Pages) Infineon Technologies AG – Universal System Basis Chip
TLE8262-2E
Limp Home
VS
T test
RLH_ PL
SBC Init
mode
LH_ PL / test
T LH_PL
Limp home
Figure 33 LH_PL/ Test block diagram
LH_P L_test. vsd
13.2.3 Test Pin
The Test pin is used to set the SBC chip into SBC Software Development Mode. When the Test pin is connected
to GND, the SBC starts in SBC Software Development Mode. When the pin is left open, or connected to Vs the
SBC starts into normal operation. Please refer to Figure 3. The Test pin has an integrated pull-up resistor
(switched ON only during SBC Init Mode) to prevent the SBC device from starting in SBC Software Development
Mode during normal life of the vehicle, as for example when the battery has been disconnected. To avoid
disturbance, the Test pin is monitored during the Init Mode (from the time VS > VUVON until Init Mode is left). If the
pin is low for the Init Mode time, Software Development Mode is reached. The mode is stored during the complete
time where VS is above VUVOFF. It means to leave Software Development Mode, the SBC must go back to SBC
OFF mode.
Data Sheet
67
Rev. 1.0, 2009-05-26