TLE8262-2E Datasheet, PDF (18/94 Pages) Infineon Technologies AG – Universal System Basis Chip

TLE8262-2E
General Product Characteristics
5.3
Thermal Characteristics
Pos. Parameter
Symbol
Limit Values
Unit Test Conditions
Min. Typ. Max.
5.3.1 Junction Ambient
R_{thJA_1L} –
40
Junction Ambient
R_{thJA_4L} –
25
5.3.2 Junction to Soldering Point
R_thJSP
–
5
–
Thermal Prewarning and Shutdown Junction Temperatures;
K/W
K/W
K/W
1) 3) _{300 mm}2
cooling area
2) 3)_{2s2p + 600 mm}2
cooling area
3)
5.3.3
V_CC1µC, Thermal Pre-warning
ON Temperature
T_jPW
120 145 170 °C
-³⁾
5.3.4
V_CC1µC, Thermal Prewarning
Hysteresis
∆T_PW
–
25
–
K
3)
5.3.5 V_CC1µC, V_CC2 Thermal Shutdown
T_jSDVcc
150
185
200
°C
3)
Temperature
5.3.6
V_CC1µC, V_CC2 Thermal Shutdown
Hysteresis
∆T_SDVcc –
35
–
K
3)
5.3.7
5.3.8
V_CC1µC, Ratio of SD to PW
Temperature
CAN Transmitter Thermal
Shutdown Temperature
T_jSDVcc/
–
1.20 –
–
3)
T_jPW
T_jSDCAN 150
–
200 °C
3)
5.3.9 CAN Transmitter Thermal
Shutdown Hysteresis
∆T_CAN
–
10
–
K
3)
5.3.10 LIN Transmitter Thermal Shutdown T_jSDLIN 150 –
Temperature
200 °C
3)
5.3.11 LIN Transmitter Thermal Shutdown ∆T_LIN
–
Hysteresis
10
–
K
3)
1) Specified Rthja value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 single layer. The product (chip +
package) was simulated on a 76.4 x 114.3 x 1.5 mm board.
2) According to Jedec JESD51-2,-5,-7 at natural convection on 2s2p board for 2W. Board: 76.2x114.3x1.5mm³ with 2 inner
copper layers (35µm thick)., with thermal via array under the exposed pad contacted the first inner copper layer and
600mm2 cooling are on the top layer (70µm)
3) Not subject to production test; specified by design;
Data Sheet
18
Rev. 1.0, 2009-05-26