TLE8262-2E Datasheet, PDF (61/94 Pages) Infineon Technologies AG – Universal System Basis Chip

TLE8262-2E
Interrupt Function
Table 11 Interrupt sources
Interrupt sources
Undervoltage at V_CC2 (except during switch off¹⁾)
Undervoltage at V_CC3(except during switch off¹⁾)
Over current at V_CC3 (except during inhibition)
Voltage at V_CC2 (during switch on¹⁾)
Voltage at V_CC3 (during switch on¹⁾)
SBC Failure
INT Activation
Rising and falling
Rising and falling
Rising
Rising
Rising
SPI bit
UV_{_VCC2}
UV_{_VCC3}
I_CC3 > I_CC3MAX
UV_{_VCC2}
UV_{_VCC3}
State
Event /
State
Event
SPI data corrupted
Rising
SPI Fail
Reset (SBC SW Development only)
Rising
Reset
Event
Wrong watchdog setting
Rising
Wrong WD set
Wake
Wake at CAN
Rising
WK CAN
Wake at LIN
Wake at WK
Rising
Rising
WK LINx
Event
WK WK pin 1..0
Cyclic WK
Rising
Cyclic WK
1) When V_CC2/3 is switched off no interrupt is generated due to the undervoltage at V_CC2/3. When switching on V_CC2/3 an
interrupt is generated when the command is sent to the SBC via SPI.
12.1.1 Interrupt for switching on Vcc2 and Vcc3
The Interrupt for Vcc2 and Vcc3 are generated when the SPI command for switching on the voltage regulator is
executed. The interrupt bit is set to “1“ and can be cleared with a Read Only command after the under voltage
threshold is reached. If the Read Only is done before the reset threshold is reached, the interrupt bit can not be
cleared as the undervoltage condition is still present. In this case a second interrupt can be issued for releasing
the undervoltage condition.
In case of a short to GND on Vcc2 or Vcc3 the interrupt for switching on the voltage regulator is issued, but the
µC can not clear the interrupt bit as the voltage regulator does not reach the undervoltage threshold.
12.1.2 Example of Interrupt Events and Read-out
The examples show single interrupt events. SPI read is done with “Read Only”. The shown interrupts are not
masked. Watchdog trigger is not shown in the examples.
The interrupt UV_Vcc2 that is generated by switching on V_CC2 is shown in Figure 27. The interrupt is sensitive on
rising event only.
Data Sheet
61
Rev. 1.0, 2009-05-26