HYS72D256520GR Datasheet, PDF (6/25 Pages) Infineon Technologies AG – 184 Pin Registered Double Data Rate SDRAM Modules

HYS72D256520GR-7-A
Registered Double Data Rate SDRAM Modules
Overview
1
Overview
1.1
Features
• 184-pin Registered 8-Byte Dual-In-Line DDR SDRAM Module for “1U” PC, Workstation and Server main
memory applications
• Two ranks 256M × 72 organization
• JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) with a single + 2.5 V (± 0.2 V) power
supply
• Built with DDR SDRAMs in 66-Lead TSOPII package
• Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
• Auto Refresh (CBR) and Self Refresh
• All inputs and outputs SSTL_2 compatible
• Re-drive for all input signals using register and PLL devices.
• Serial Presence Detect with E²PROM
• Low Profile Modules form factor: 133.35 mm × 30.48 mm (1.2”) × 6.80 mm with stacked components)
• Based on Jedec standard reference card layout RawCard “N”
• Gold plated contacts
Table 1 Performance
Part Number Speed Code
Speed Grade
max. Clock Frequency @CL2.5
f_CK
@CL2
f_CK
–7
DDR266A
PC2100
143
133
Unit
–
MHz
MHz
1.2
Description
The HYS72D256520GR–7–A are low profile versions of the standard Registered DIMM modules with 1.2” inch
(30,48 mm) height for 1U Server Applications. The Low Profile DIMM versions are available as 256M × 72 (2GB).
The memory array is designed with Double Data Rate Synchronous DRAMs for ECC applications. All control and
address signals are re-driven on the DIMM using register devices and a PLL for the clock distribution. This reduces
capacitive loading to the system bus, but adds one cycle to the SDRAM timing. A variety of decoupling capacitors
are mounted on the PC board. The DIMMs feature serial presence detect based on a serial E²PROM device using
the 2-pin I²C protocol. The first 128 bytes are programmed with configuration data and the second 128 bytes are
available to the customer.
Data Sheet
6
Rev. 1.02, 2003-12
10282003-P6EY-RWQ2