English
Language : 

HYS72D256520GR Datasheet, PDF (12/25 Pages) Infineon Technologies AG – 184 Pin Registered Double Data Rate SDRAM Modules
HYS72D256520GR-7-A
Registered Double Data Rate SDRAM Modules
Electrical Characteristics
3
Electrical Characteristics
3.1
Operating Conditions
Table 6 Absolute Maximum Ratings
Parameter
Voltage on I/O pins relative to VSS
Voltage on inputs relative to VSS
Voltage on VDD supply relative to VSS
Voltage on VDDQ supply relative to VSS
Operating temperature (ambient)
Storage temperature (plastic)
Power dissipation (per SDRAM component)
Short circuit output current
Symbol
VIN, VOUT
min.
–0.5
VIN
–1
VDD
–1
VDDQ
–1
TA
0
TSTG
-55
PD
–
IOUT
–
Values
typ.
max.
–
VDDQ +
0.5
–
+3.6
–
+3.6
–
+3.6
–
+70
–
+150
1
–
50
–
Unit Note/ Test
Condition
V–
V–
V–
V–
°C –
°C –
W–
mA –
Attention: Permanent damage to the device may occur if “Absolute Maximum Ratings” are exceeded. This
is a stress rating only, and functional operation should be restricted to recommended operation
conditions. Exposure to absolute maximum rating conditions for extended periods of time may
affect device reliability and exceeding only one of the values may cause irreversible damage to
the integrated circuit.
Table 7 Electrical Characteristics and DC Operating Conditions
Parameter
Symbol
Values
Unit Note/Test Condition 1)
Min.
Typ.
Max.
Device Supply Voltage
VDD
2.3
2.5
2.7
V
Output Supply Voltage
VDDQ
2.3
2.5
2.7
V
2)
EEPROM supply voltage VDDSPD 2.3
2.5
3.6
V—
Supply Voltage, I/O Supply VSS,
0
Voltage
VSSQ
0
V—
Input Reference Voltage VREF
0.49 × VDDQ 0.5 × VDDQ 0.51 × VDDQ V 3)
I/O Termination Voltage VTT
(System)
VREF – 0.04
VREF + 0.04 V 4)
Input High (Logic1) Voltage VIH(DC)
Input Low (Logic0) Voltage VIL(DC)
Input Voltage Level,
CK and CK Inputs
VIN(DC)
VREF + 0.15
–0.3
–0.3
VDDQ + 0.3 V 7)
VREF – 0.15 V 7)
VDDQ + 0.3 V 7)
Input Differential Voltage, VID(DC) 0.36
CK and CK Inputs
VDDQ + 0.6 V
7)5)
VI-Matching Pull-up
Current to Pull-down
Current
VIRatio 0.71
1.4
— 6)
Input Leakage Current
II
–2
2
µA Any input 0 V ≤ VIN ≤ VDD;
All other pins not under test
= 0 V 7)8)
Data Sheet
12
Rev. 1.02, 2003-12
10282003-P6EY-RWQ2