HYS72D256520GR Datasheet, PDF (14/25 Pages) Infineon Technologies AG – 184 Pin Registered Double Data Rate SDRAM Modules

HYS72D256520GR-7-A
Registered Double Data Rate SDRAM Modules
Electrical Characteristics
Table 8 I_DD Conditions
Parameter
Auto-Refresh Current: t_RC = t_RFCMIN, burst refresh
Self-Refresh Current: CKE ≤ 0.2 V; external clock on; t_CK = t_CKMIN
Operating Current: four bank; four bank interleaving with BL = 4; Refer to the following page for
detailed test conditions.
Symbol
I_DD5
I_DD6
I_DD7
Table 9 I_DD Specifications
Product Type & Organisation HYS72D256520GR-7-A
Unit Note/ Test Conditions⁵⁾
2GB
×72
2 Ranks
–7
I_DD0
I_DD1
I_DD2P
I_DD2F
I_DD2Q
I_DD3P
I_DD3N
I_DD4R
I_DD4W
I_DD5
I_DD6
I_DD7
typ.
4008
4188
736
1816
740
880
2356
4548
3198
6168
466
7248
max.
4908
5088
880
2176
1384
1024
2896
5448
5358
7428
556
8688
mA ¹⁾⁴⁾
mA ¹⁾³⁾⁴⁾
mA ²⁾⁴⁾
mA ²⁾⁴⁾
mA ²⁾⁴⁾
mA ²⁾⁴⁾
mA ²⁾⁴⁾
mA ¹⁾³⁾⁴⁾
mA ¹⁾⁴⁾
mA ¹⁾⁴⁾
mA ²⁾⁴⁾
mA ^1)3)4)5)
1) The module I_DD values are calculated from the component I_DD datasheet values are:
n * I_DD×[component] for single bank modules (n: number of components per module bank)
n * I_DD×[component] + n * I_DD3N[component] for two bank modules (n: number of components per module bank)
2) The module I_DD values are calculated from the component I_DD datasheet values are:
n * I_DD×[component] for single bank modules (n: number of components per module bank)
2 * n * I_DD×[component] for single two bank modules (n: number of components per module bank)
3) DQ I/O (I_DDQ) currents are not included into calculations: module I_DD values will be measured differently depending on load
conditions
4) DRAM component currents only: module I_DD will be measured differently depending upon register and PLL operation
currents
5) Test condition for maximum values: V_DD = 2.7 V, T_A = 10 °C
Data Sheet
14
Rev. 1.02, 2003-12
10282003-P6EY-RWQ2