TC1130_08 Datasheet, PDF (51/114 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1130
Functional Description
3.12 Universal Serial Bus Interface (USB)
Figure 3-8 shows a global view of the functional blocks of the Universal Serial Bus
interface (USB).
The USB module is further supplied with clock control, interrupt control, address
decoding, and port control logic. One DMA request can be generated by USB module.
Clock
f _USB
Control
Address
Decoder
Interrupt
Control
ISR0
ISR1
ISR2
ISR3
ISR4
ISR5
ISR6
ISR7
To DMA
USB
Module
(Kernel)
USBCLKB
RCVIB
VPIB
VMIB
VPOB
Port 4
Control
VMOB
USBOEB
D+
D-
P4.0 /USBCLK
P4.1 /RCVI
P4.2 /VPI
P4.3 /VMI
P4.4 /VPO
P4.5 /VMO
P4.6 /USBOE
Figure 3-8 General Block Diagram of the USB Interface
The USB handles all transactions between the serial USB bus and the internal (parallel)
bus of the microcontroller. The USB module includes several units which are required to
support data handling with the USB bus: the on-chip USB transceiver (optionally), the
flexible USB buffer block with a 32-bit wide RAM, the buffer control unit with sub modules
for USB and CPU memory access control, the UDC_IF device interface for USB protocol
handling, the microcontroller interface unit (MCU) with the USB specific special function
registers and the interrupt generation unit. A clock generation unit provides the clock
signal for the USB module for full speed and low speed USB operation.
Data Sheet
45
V1.1, 2008-12