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XC167-16 Datasheet, PDF (439/442 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units
XC167-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Keyword Index
features (Flash) 3-27 [1]
PSLR 18-68 [2]
PSW 4-57 [1]
Q
QR0 4-46 [1]
QR1 4-46 [1]
QX0, QX1 4-48 [1]
R
RAM
data SRAM 3-9 [1]
dual ported 3-9 [1]
program/data 3-11 [1]
status after reset 6-7 [1]
Real Time Clock (->RTC) 2-21 [1], 15-1 [2]
Register Areas 3-4 [1]
Register map
TwinCAN module 22-47 [2]
Register Table
LXBUS Peripherals 23-16 [2]
PD+BUS Peripherals 23-1 [2]
RELH, RELL 15-9 [2]
Reserved bits 2-16 [1]
Reset 6-2 [1]
Configuration 6-14 [1]
Output 6-9 [1]
Source indication 6-46 [1]
Values 6-6 [1]
RSTCFG 6-16 [1]
RSTCON 6-24 [1]
RTC 2-21 [1], 15-1 [2]
RTC_CON 15-5 [2]
RTC_IC 15-13 [2]
RTC_ISNC 15-13 [2]
RTCH, RTCL 15-8 [2]
S
SCUSLC 6-52 [1]
SCUSLS 6-51 [1]
Security
features (Flash) 3-27 [1]
Segment
Address 6-19 [1]
boundaries 3-15 [1]
Segmentation 4-37 [1]
Self-calibration 16-17 [2]
Serial Interface 2-23 [1], 2-24 [1]
ASC 19-1 [2]
Asynchronous 19-5 [2]
CAN 2-25 [1]
IIC 2-26 [1], 21-1 [2]
SSC 20-1 [2]
Synchronous 19-19 [2]
SFR 3-5 [1]
Sharing
Interrupt Nodes 5-34 [1]
Slave mode
IIC Bus 21-13 [2]
Sleep mode 6-56 [1]
Software
Traps 5-43 [1]
Source
Interrupt 5-12 [1]
Reset 6-46 [1]
SP 4-54 [1]
Special operation modes (config.) 6-21 [1]
SPSEG 4-54 [1]
SRAM
Data 3-9 [1]
SRCPx 5-23 [1]
SSC 20-1 [2]
Baudrate generation 20-12 [2]
Block diagram 20-3 [2]
Continous transfer operation 20-12 [2]
Error detection 20-14 [2]
Full duplex operation 20-8 [2]
General Operation 20-1 [2]
Half duplex operation 20-11 [2]
Interrupts 20-14 [2]
SSCx_CON 20-4 [2], 20-5 [2]
Stack 3-12 [1], 4-53 [1]
Startup Configuration 6-14 [1]
STKOV 4-56 [1]
STKUN 4-56 [1]
SYSCON0 6-43 [1]
User’s Manual
i-6
V2.0, 2004-04