XC167-16 Datasheet, PDF (242/442 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC167-16 Derivatives
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
Note: The Receive FIFO Interrupt Trigger Level bitfield RXFITL is a don’t care in
Transparent Mode.
Interrupt generation for the transmit FIFO depends on the TXFIFO filling level and the
execution of write operations to the register TBUF. Transparent Mode for the TXFIFO is
enabled when bits TXTMEN and TXFEN are set.
A transmit buffer interrupt TBIR is always generated when the TXFIFO is not full (TXFFL
not equal to maximum) after a byte has been written into register ASCx_TBUF. TBIR is
also activated after a TXFIFO flush operation or when the TXFIFO becomes enabled
(TXTMEN and TXFEN set) when it was previously disabled. In these cases, the TXFIFO
is empty and ready to be filled with data.
If the TXFIFO is full (TXFFL = maximum) and an additional byte is written into TBUF, no
further transmit buffer interrupt will be generated after the TBUF write operation. In this
case the data byte last written into the transmit FIFO is overwritten and an overrun error
interrupt (EIR) will be generated with bit OE set.
Note: The Transmit FIFO Interrupt Trigger Level bitfield TXFITL is a don’t care in
Transparent Mode.
19.2.7 IrDA Mode
The duration of the IrDA pulse is normally 3/16 of a bit period. The IrDA standard also
allows the pulse duration to be independent of the baudrate or bit period. In this case,
the width of the transmitted pulse always corresponds to the 3/16 pulse width at
115.2 kbit/s, which is 1.627 µs. Either fixed or bit-period-dependent IrDA pulse width
generation can be selected. The IrDA pulse width mode is selected by bit IRPW.
In case of fixed IrDA pulse width generation, the lower eight bits in register PMW are
used to adapt the IrDA pulse width to a fixed value such as 1.627 µs. The fixed IrDA
pulse width is generated by a programmable timer as shown in Figure 19-10.
PWM
Start
t_IPW
Timer
f_ASC
8-bit Timer
IrDA Pulse
MCA05441
Figure 19-10 Fixed IrDA Pulse Generation
The IrDA pulse width can be calculated according the formulas given in Table 19-1.
Note: The name PMW in the formulas of Table 19-1 represents the contents of the pulse
mode/width register PMW (PW_VALUE), taken as an unsigned 8-bit integer.
User’s Manual
ASC_X8, V2.1
19-16
V2.0, 2004-04