XC167-16 Datasheet, PDF (414/442 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC167-16 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
22.3.3 Register Table
Table 22-10 shows the system registers related to the TwinCAN module. It summarizes
the addresses and reset values. In order to simplify the kernel description, the prefix
‘CAN_’ is added only in this register list.
The start address for the TwinCAN module is 20’0000_H, the register offsets (relative to
this address) are given in the TwinCAN kernel description. See Figure 22-27. A full
register listing of all CAN registers is provided in register table section and in the system
book.
Table 22-10 TwinCAN Module Register Summary
Name
Description
Address¹⁾ Reset
16-Bit
Value
TwinCAN Module System Registers
CAN_PISEL
CAN_0IC
TwinCAN Port Input Select Register
TwinCAN Interrupt Control Register for the
CAN interrupt node 0.
20’0004_H
F196_H
0000_H
0000_H
CAN_1IC
TwinCAN Interrupt Control Register for the F142_H
CAN interrupt node 1.
0000_H
CAN_2IC
TwinCAN Interrupt Control Register for the F144_H
CAN interrupt node 2.
0000_H
CAN_3IC
TwinCAN Interrupt Control Register for the F146_H
CAN interrupt node 3.
0000_H
CAN_4IC
TwinCAN Interrupt Control Register for the F148_H
CAN interrupt node 4.
0000_H
CAN_5IC
TwinCAN Interrupt Control Register for the F14A_H
CAN interrupt node 5.
0000_H
CAN_6IC
TwinCAN Interrupt Control Register for the F14C_H
CAN interrupt node 6.
0000_H
CAN_7IC²⁾
TwinCAN Interrupt Control Register for the F14E_H
CAN interrupt node 7.
0000_H
1) The 8-bit short addresses are not available for the TwinCAN module kernel registers.
2) In the XC167 device, the CAN interrupt node 7 is shared with the SDLM interrupt 1. In order to avoid
mismatches if the CAN interrupt 7 is used by the TwinCAN module, the SDLM interrupt 1 should be mapped
to a common SDLM interrupt 0 (see register SDLM_PISEL).
User’s Manual
TwinCAN_X1, V2.1
22-91
V2.0, 2004-04