XC164KM Datasheet, PDF (31/62 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164KM
Derivatives
Functional Description
T3CON.BPS1
f _GPT
2ⁿ:1
T2IN
T2EUD
T3IN
T3EUD
Basic Clock
Aux. Timer T2
T2
Mode
Control
U/D
Reload
Capture
T3
Mode
Control
Core Timer T3
U/D
T3OTL
Toggle
Latch
Interrupt
Request
(T2IRQ)
Interrupt
Request
(T3IRQ)
T3OUT
T4IN
T4EUD
Capture
T4
Mode
Control
Reload
Aux. Timer T4
U/D
Interrupt
Request
(T4IRQ)
MCA05563
Figure 3-4 Block Diagram of GPT1
With its maximum resolution of 2 system clock cycles, the GPT2 module provides
precise event control and time measurement. It includes two timers (T5, T6) and a
capture/reload register (CAPREL). Both timers can be clocked with an input clock which
is derived from the CPU clock via a programmable prescaler or with external signals. The
Data Sheet
29
V1.0, 2005-11