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XC164KM Datasheet, PDF (24/62 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core
XC164KM
Derivatives
Functional Description
Table 3-2 XC164KM Interrupt Nodes (cont’d)
Source of Interrupt or PEC
Service Request
Control
Register
Vector
Location1)
Trap
Number
Unassigned node
–
xx’0048H
12H / 18D
Unassigned node
–
xx’004CH
13H / 19D
Unassigned node
–
xx’0050H
14H / 20D
Unassigned node
–
xx’0054H
15H / 21D
Unassigned node
–
xx’0058H
16H / 22D
Unassigned node
–
xx’005CH
17H / 23D
Unassigned node
–
xx’0078H
1EH / 30D
Unassigned node
–
xx’007CH
1FH / 31D
Unassigned node
–
xx’0080H
20H / 32D
Unassigned node
–
xx’0084H
21H / 33D
Unassigned node
–
xx’00A0H
28H / 40D
Unassigned node
–
xx’00A4H
29H / 41D
Unassigned node
–
xx’00FCH
3FH / 63D
Unassigned node
–
xx’0100H
40H / 64D
Unassigned node
–
xx’0104H
41H / 65D
Unassigned node
–
xx’012CH
4BH / 75D
Unassigned node
–
xx’0134H
4DH / 77D
Unassigned node
–
xx’0138H
4EH / 78D
Unassigned node
–
xx’013CH
4FH / 79D
Unassigned node
–
xx’0140H
50H / 80D
Unassigned node
–
xx’0160H
58H / 88D
1) Register VECSEG defines the segment where the vector table is located to.
Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table
represents the default setting, with a distance of 4 (two words) between two vectors.
Data Sheet
22
V1.0, 2005-11