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XC164KM Datasheet, PDF (18/62 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core
XC164KM
Derivatives
Functional Description
can consist of up to 16 word wide (R0 to R15) and/or byte wide (RL0, RH0, …, RL7, RH7)
so-called General Purpose Registers (GPRs).
The upper 256 bytes of the DPRAM are directly bit addressable. When used by a GPR,
any location in the DPRAM is bit addressable.
1024 bytes (2 × 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are word wide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the XC166 Family. Therefore, they should
either not be accessed, or written with zeros, to ensure upward compatibility.
Table 3-1 XC164KM Memory Map
Address Area
Start Loc. End Loc. Area Size1) Notes
Flash register space FF’F000H FF’FFFFH 4 Kbytes
2)
Reserved (Acc. trap) F8’0000H FF’FFFFH 508 Kbytes
Reserved for PSRAM E0’0800H F7’FFFFH < 1.5 Mbytes Minus PSRAM
Program SRAM
E0’0000H E0’07FFH 2 Kbytes
Reserved for pr. mem. C1’0000H DF’FFFFH < 2 Mbytes Minus Flash
Program Flash
C0’0000H C0’FFFFH 64 Kbytes XC164KM-8F
C0’0000H C0’7FFFH 32 Kbytes XC164KM-4F
Reserved
20’0800H BF’FFFFH < 10 Mbytes Minus TwinCAN
TwinCAN registers
20’0000H 20’07FFH 2 Kbytes
Accessed via EBC
Reserved
01’0000H 1F’FFFFH < 2 Mbytes Minus segment 0
SFR area
00’FE00H 00’FFFFH 0.5 Kbyte
–
Dual-Port RAM
00’F600H 00’FDFFH 2 Kbytes
–
Reserved for DPRAM 00’F200H 00’F5FFH 1 Kbyte
–
ESFR area
00’F000H 00’F1FFH 0.5 Kbyte
–
XSFR area
00’E000H 00’EFFFH 4 Kbytes
–
Reserved
00’C800H 00’DFFFH 6 Kbytes
–
Data SRAM
00’C000H 00’C7FFH 2 Kbytes
XC164KM-8F only
Reserved for DSRAM 00’8000H 00’BFFFH 16 Kbytes –
Reserved
00’0000H 00’7FFFH 32 Kbytes –
1) The areas marked with “<” are slightly smaller than indicated, see column “Notes”.
2) Not defined register locations return a trap code (1E9BH).
Data Sheet
16
V1.0, 2005-11