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TC1767 Datasheet, PDF (21/126 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller | |||
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TC1767
â 72 Kbyte Local Data RAM (LDRAM)
â 0 Kbyte Data Cache (DACHE)
⢠On-chip SRAMs with parity error detection
Introduction
2.2.3.2 High-performance 32-bit Peripheral Control Processor
The PCP is a flexible Peripheral Control Processor optimized for interrupt handling and
thus unloading the CPU.
Features
⢠Data move between any two memory or I/O locations
⢠Data move with predefined limit supported
⢠Read-Modify-Write capabilities
⢠Full computation capabilities including basic MUL/DIV
⢠Read/move data and accumulate it to previously read data
⢠Read two data values and perform arithmetic or logical operation and store result
⢠Bit-handling capabilities (testing, setting, clearing)
⢠Flow control instructions (conditional/unconditional jumps, breakpoint)
⢠Dedicated Interrupt System
⢠PCP SRAMs with parity error detection
⢠PCP/FPI clock mode 1:1 and 2:1 available
Integrated PCP related On-Chip Memories
⢠16 Kbyte Code Memory (CMEM)
⢠8 Kbyte Parameter Memory (PRAM)
2.3
On Chip System Units
The TC1767 micro controller offers several versatile on-chip system peripheral units
such as DMA controller, embedded Flash module, interrupt system and ports.
2.3.1
Flexible Interrupt System
The TC1767 includes a programmable interrupt system with the following features:
Features
⢠Fast interrupt response
⢠Hardware arbitration
⢠Independent interrupt systems for CPU and PCP
⢠Programmable service request nodes (SRNs)
Data Sheet
17
V1.3, 2009-09
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