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TC1767 Datasheet, PDF (121/126 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
TC1767
Electrical Parameters
t50
SCLK1)2)
t51
t51
MTSR1)
MRST1)
SLSOx2)
t52
t53
Data
valid
t51
1) This timing is based on the following setup: CON.PH = CON.PO = 0.
2) The transition at SLSOx is based on the following setup: SSOTC.TRAIL = 0
and the first SCLK high pulse is in the first one of a transmission.
SSC_TmgMM
Figure 34 SSC Master Mode Timing
SCLK1)
MTSR1)
MRST1)
SLSI
t54
First shift
SCLK edge
First latching
SCLK edge
t55
t55
t56
t57
Data
valid
t60
t60
Last latching
SCLK edge
t56
t57
Data
valid
t61
t59
t58
1) This timing is based on the following setup: CON.PH = CON.PO = 0.
SSC_TmgSM
Figure 35 SSC Slave Mode Timing
Data Sheet
117
V1.3, 2009-09