HYS72V16300GR Datasheet, PDF (13/22 Pages) Infineon Technologies AG – PC133 Registered SDRAM-Modules

HYS 72Vxx3xxGR
PC133 Registered SDRAM-Modules
SPD-Table for -7.5 Registered DIMM Modules
Byte Description
SPD
Hex
#
Entry
Value
0
Number of SPD Bytes
128
80
1
Total Bytes in Serial PD
256
08
2
Memory Type
SDRAM
04
3
Number of Row Addresses 12/13
0C 0C 0C 0D 0D 0D 0D 0D 0D 0D 0D
4
Number of Column
Addresses
10/11/12
0A 0A 0B 0A 0A 0B 0B 0B 0B 0C 0C
5
Number of DIMM Banks
1/2
01 01 01 01 01 01 01 02 02 01 02
6
Module Data Width
72
48
7
Module Data Width (cont’d) 0
00
8
Module Interface Levels
LVTTL
01
9
Cycle Time at CL = 3
7.5 ns
75
10 Access Time from Clock at 5.4 ns
54
CL = 3
11
DIMM Config (Error Det/
ECC
02
Corr.)
12 Refresh Rate/Type
15.6/7.8 µs 80 80 80 82 82 82 82 82 82 82 82
13 SDRAM Width, Primary
x4 / x8
04 08 04 08 08 04 04 04 04 04 04
14 Error Checking SDRAM
Data Width
x4 / x8
04 08 04 08 08 04 04 04 04 04 04
15
Minimum t_CCD
16 Burst Length Supported
1 CLK
01
1, 2, 4, 8 & 8F 0F 0F 0F 8F 0F 8F 0F 8F 8F 8F
(full page)
17 Number of SDRAM Banks 4
04
18 SDRAM Supported CAS 2 & 3
06
Latencies
19 SDRAM CS Latencies
0
01
20 SDRAM WE Latencies
0
01
21 SDRAM DIMM Module
with PLL
1F
Attributes
22
SDRAM Device Attributes V_DD tol +/–
0E
10%
23 Min. Clock Cycle Time at 10 ns
A0
CL = 2
24 Max. Data Access Time from 6.0 ns
60
Clock for CL = 2
INFINEON Technologies
13
2002-07-18