TC1784 Datasheet, PDF (102/123 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1784
5.3.8 Peripheral Timings
Electrical ParametersAC Parameters
Note: Peripheral timing parameters are not subject to production test. They are verified
by design/characterization.
5.3.8.1 Micro Link Interface (MLI) Timing
MLI Transmitter Timing
TCLKx
TDATAx
TVALIDx
t13
t₁₀
t₁₂
t₁₁
t15
t₁₆
t₁₇
TREADYx
t14
t15
MLI Receiver Timing
t23
RCLKx
RDATAx
RVALIDx
RREADYx
t₂₀
t₂₂
t₂₁
t₂₅
t₂₆
t₂₇
t24
t₂₇
MLI_Tmg_2.vsd
Figure 15 MLI Interface Timing
Note: The generation of RREADYx is in the input clock domain of the receiver. The
reception of TREADYx is asynchronous to TCLKx.
Data Sheet
95
V 1.1.1, 2014-05